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msm: pcie: add option to disable L1ss TO for DRV suspend

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There are usecases where clients will not want DRV subsystem
to enable L1ss inactivity timeout. Provide PCIe clients the
option to disable L1ss inactivity timeout when requesting a DRV
suspend.

Change-Id: I940526a58bb2496529e919b5b602c0bc31ca9ae1
Signed-off-by: Tony Truong <truong@codeaurora.org>
This commit is contained in:
Tony Truong
2019-12-19 14:58:46 -08:00
committed by Gerrit - the friendly Code Review server
parent 34a320eb90
commit b8f822a30a
2 changed files with 10 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
drivers/pci/controller/pci-msm.c
View File

@@ -6997,11 +6997,13 @@ static int msm_pcie_drv_resume(struct msm_pcie_dev_t *pcie_dev)
return 0;
}
static int msm_pcie_drv_suspend(struct msm_pcie_dev_t *pcie_dev)
static int msm_pcie_drv_suspend(struct msm_pcie_dev_t *pcie_dev,
u32 options)
{
struct rpmsg_device *rpdev = pcie_drv.rpdev;
struct msm_pcie_drv_info *drv_info = pcie_dev->drv_info;
struct msm_pcie_drv_msg *drv_enable = &drv_info->drv_enable;
struct msm_pcie_drv_tre *pkt = &drv_enable->pkt;
struct msm_pcie_clk_info_t *clk_info;
int ret, i;
@@ -7024,6 +7026,11 @@ static int msm_pcie_drv_suspend(struct msm_pcie_dev_t *pcie_dev)
/* disable global irq - no more linkdown/aer detection */
disable_irq(pcie_dev->irq[MSM_PCIE_INT_GLOBAL_INT].num);
if (options & MSM_PCIE_CONFIG_NO_L1SS_TO)
pkt->dword[2] = 0;
else
pkt->dword[2] = drv_info->l1ss_timeout_us / 1000;
drv_info->reply_seq = drv_info->seq++;
drv_enable->hdr.seq = drv_info->reply_seq;
@@ -7134,7 +7141,7 @@ int msm_pcie_pm_control(enum msm_pcie_pm_opt pm_opt, u32 busnr, void *user,
PCIE_DBG(pcie_dev,
"PCIe: RC%d: DRV: user requests for DRV suspend\n",
rc_idx);
ret = msm_pcie_drv_suspend(pcie_dev);
ret = msm_pcie_drv_suspend(pcie_dev, options);
break;
case MSM_PCIE_SUSPEND:
PCIE_DBG(&msm_pcie_dev[rc_idx],

1
include/linux/msm_pcie.h
View File

@@ -12,6 +12,7 @@ enum msm_pcie_config {
MSM_PCIE_CONFIG_NO_CFG_RESTORE = 0x1,
MSM_PCIE_CONFIG_LINKDOWN = 0x2,
MSM_PCIE_CONFIG_NO_RECOVERY = 0x4,
MSM_PCIE_CONFIG_NO_L1SS_TO = 0x8,
};
enum msm_pcie_pm_opt {