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i3c: i3c-master-qcom-geni: Fix wrong reset of the TX, RX engine

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This change corrects the wrong reset of the Primary and Secondary
Engine of the QUP SE upon read, write error.

Change-Id: I6d1461864745e22f10f87521947a934dcb02d161
Signed-off-by: Mukesh Kumar Savaliya <msavaliy@codeaurora.org>
This commit is contained in:
Mukesh Kumar Savaliya
2020-07-22 12:43:30 +05:30
parent 3f06319b3c
commit b07d219d61
1 changed files with 2 additions and 2 deletions
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4
drivers/i3c/master/i3c-master-qcom-geni.c
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@@ -806,10 +806,10 @@ static int _i3c_geni_execute_command
if (gi3c->err) { if (gi3c->err) {
if (rnw == READ_TRANSACTION) if (rnw == READ_TRANSACTION)
writel_relaxed(1, gi3c->se.base + writel_relaxed(1, gi3c->se.base +
SE_DMA_TX_FSM_RST); SE_DMA_RX_FSM_RST);
else else
writel_relaxed(1, gi3c->se.base + writel_relaxed(1, gi3c->se.base +
SE_DMA_RX_FSM_RST); SE_DMA_TX_FSM_RST);
wait_for_completion_timeout(&gi3c->done, XFER_TIMEOUT); wait_for_completion_timeout(&gi3c->done, XFER_TIMEOUT);
} }
geni_se_rx_dma_unprep(gi3c->se.i3c_rsc.wrapper_dev, geni_se_rx_dma_unprep(gi3c->se.i3c_rsc.wrapper_dev,