5ad450e3a1
commit 9e45365f1469ef2b934f9d035975dbc9ad352116 upstream.
This is a new ID register introduced in 8.7.
Change-Id: I0421d4caf455202bda563b449ff1af23449884e5
Signed-off-by: Joey Gouly <joey.gouly@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Marc Zyngier <maz@kernel.org>
Cc: James Morse <james.morse@arm.com>
Cc: Alexandru Elisei <alexandru.elisei@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Reiji Watanabe <reijiw@google.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20211210165432.8106-3-joey.gouly@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Git-commit: a44e7ddb58
Git-repo: https://android.googlesource.com/kernel/common/
Signed-off-by: Kishor Krishna Bhat <quic_kishkris@quicinc.com>
79 lines
1.8 KiB
C
79 lines
1.8 KiB
C
/*
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* Copyright (C) 2014 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_CPU_H
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#define __ASM_CPU_H
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#include <linux/cpu.h>
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#include <linux/init.h>
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#include <linux/percpu.h>
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/*
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* Records attributes of an individual CPU.
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*/
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struct cpuinfo_arm64 {
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struct cpu cpu;
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struct kobject kobj;
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u32 reg_ctr;
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u32 reg_cntfrq;
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u32 reg_dczid;
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u32 reg_midr;
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u32 reg_revidr;
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u64 reg_id_aa64dfr0;
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u64 reg_id_aa64dfr1;
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u64 reg_id_aa64isar0;
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u64 reg_id_aa64isar1;
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u64 reg_id_aa64isar2;
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u64 reg_id_aa64mmfr0;
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u64 reg_id_aa64mmfr1;
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u64 reg_id_aa64mmfr2;
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u64 reg_id_aa64pfr0;
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u64 reg_id_aa64pfr1;
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u64 reg_id_aa64zfr0;
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u32 reg_id_dfr0;
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u32 reg_id_isar0;
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u32 reg_id_isar1;
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u32 reg_id_isar2;
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u32 reg_id_isar3;
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u32 reg_id_isar4;
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u32 reg_id_isar5;
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u32 reg_id_mmfr0;
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u32 reg_id_mmfr1;
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u32 reg_id_mmfr2;
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u32 reg_id_mmfr3;
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u32 reg_id_pfr0;
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u32 reg_id_pfr1;
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u32 reg_mvfr0;
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u32 reg_mvfr1;
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u32 reg_mvfr2;
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/* pseudo-ZCR for recording maximum ZCR_EL1 LEN value: */
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u64 reg_zcr;
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};
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DECLARE_PER_CPU(struct cpuinfo_arm64, cpu_data);
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void cpuinfo_store_cpu(void);
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void __init cpuinfo_store_boot_cpu(void);
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void __init init_cpu_features(struct cpuinfo_arm64 *info);
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void update_cpu_features(int cpu, struct cpuinfo_arm64 *info,
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struct cpuinfo_arm64 *boot);
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#endif /* __ASM_CPU_H */
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