Snapshot of perf tracepoint framework taken straight of msm-4.4 commit <fec225ae458291> (Merge "qpnp-fg-gen3: prime CC_SOC_SW when capacity learning begins") [Fixing coding style issues] [Switch perf_trace_counters.c to new hotplug notifier method] [Replace inline assembly with read/write_sysreg()] [Change perf_trace_user.h to display 7 counters like perf_trace_counters.h] [Change perf_trace_user.c to use debugfs_create_dir() instead of obsolete perf_create_debug_dir()] It contains the following squashed commit: Perf: arm64: avoid use of uninitialized variable Variable "buf" is not initialized. It may contain the data from stack when "count == 0". Kernel information leak is possible due to different code path execution. The commit also includes the squashed patch from Olav as follows: Perf: arm64: Use proper API to get task cpu Instead of directly accessing thread_info structure to get the task cpu use the appropriate wrapper API. This is needed for subsequent patches refactors the location of task cpu. Change-Id: I83c3ca3fbc9237c9109735f5fb2398cb4e9f6de9 Signed-off-by: Olav Haugan <ohaugan@codeaurora.org> Signed-off-by: Patrick Fay <pfay@codeaurora.org> Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org> Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
104 lines
2.5 KiB
C
104 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2013-2014, 2017-2018, The Linux Foundation. All rights reserved.
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*/
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#undef TRACE_SYSTEM
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#define TRACE_SYSTEM perf_trace_counters
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#if !defined(_PERF_TRACE_COUNTERS_H_) || defined(TRACE_HEADER_MULTI_READ)
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#define _PERF_TRACE_COUNTERS_H_
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/* Ctr index for PMCNTENSET/CLR */
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#define CC 0x80000000
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#define C0 0x1
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#define C1 0x2
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#define C2 0x4
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#define C3 0x8
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#define C4 0x10
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#define C5 0x20
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#define C_ALL (CC | C0 | C1 | C2 | C3 | C4 | C5)
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#define NUM_L1_CTRS 6
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#include <linux/sched.h>
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#include <linux/cpumask.h>
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#include <linux/tracepoint.h>
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DECLARE_PER_CPU(u32, cntenset_val);
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DECLARE_PER_CPU(u32, previous_ccnt);
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DECLARE_PER_CPU(u32[NUM_L1_CTRS], previous_l1_cnts);
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TRACE_EVENT(sched_switch_with_ctrs,
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TP_PROTO(pid_t prev, pid_t next),
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TP_ARGS(prev, next),
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TP_STRUCT__entry(
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__field(pid_t, old_pid)
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__field(pid_t, new_pid)
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__field(u32, cctr)
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__field(u32, ctr0)
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__field(u32, ctr1)
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__field(u32, ctr2)
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__field(u32, ctr3)
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__field(u32, ctr4)
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__field(u32, ctr5)
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),
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TP_fast_assign(
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u32 cpu = smp_processor_id();
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u32 i;
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u32 cnten_val;
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u32 total_ccnt = 0;
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u32 total_cnt = 0;
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u32 delta_l1_cnts[NUM_L1_CTRS];
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__entry->old_pid = prev;
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__entry->new_pid = next;
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cnten_val = per_cpu(cntenset_val, cpu);
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if (cnten_val & CC) {
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/* Read value */
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total_ccnt = read_sysreg(pmccntr_el0);
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__entry->cctr = total_ccnt -
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per_cpu(previous_ccnt, cpu);
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per_cpu(previous_ccnt, cpu) = total_ccnt;
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}
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for (i = 0; i < NUM_L1_CTRS; i++) {
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if (cnten_val & (1 << i)) {
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/* Select */
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write_sysreg(i, pmselr_el0);
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isb();
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/* Read value */
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total_cnt = read_sysreg(pmxevcntr_el0);
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delta_l1_cnts[i] = total_cnt -
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per_cpu(previous_l1_cnts[i], cpu);
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per_cpu(previous_l1_cnts[i], cpu) =
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total_cnt;
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} else
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delta_l1_cnts[i] = 0;
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}
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__entry->ctr0 = delta_l1_cnts[0];
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__entry->ctr1 = delta_l1_cnts[1];
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__entry->ctr2 = delta_l1_cnts[2];
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__entry->ctr3 = delta_l1_cnts[3];
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__entry->ctr4 = delta_l1_cnts[4];
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__entry->ctr5 = delta_l1_cnts[5];
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),
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TP_printk("prev_pid=%d, next_pid=%d, CCNTR: %u, CTR0: %u, CTR1: %u, CTR2: %u, CTR3: %u, CTR4: %u, CTR5: %u",
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__entry->old_pid, __entry->new_pid,
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__entry->cctr,
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__entry->ctr0, __entry->ctr1,
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__entry->ctr2, __entry->ctr3,
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__entry->ctr4, __entry->ctr5)
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);
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#endif
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#undef TRACE_INCLUDE_PATH
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#define TRACE_INCLUDE_PATH ../../arch/arm64/kernel
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#define TRACE_INCLUDE_FILE perf_trace_counters
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#include <trace/define_trace.h>
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