Files
kernel_xiaomi_sm8250/arch
Thomas Bogendoerfer 4cf1b96a36 MIPS: SNI: Fix MIPS_L1_CACHE_SHIFT
[ Upstream commit 564c836fd945a94b5dd46597d6b7adb464092650 ]

Commit 930beb5ac0 ("MIPS: introduce MIPS_L1_CACHE_SHIFT_<N>") forgot
to select the correct MIPS_L1_CACHE_SHIFT for SNI RM. This breaks non
coherent DMA because of a wrong allocation alignment.

Fixes: 930beb5ac0 ("MIPS: introduce MIPS_L1_CACHE_SHIFT_<N>")
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-09-23 12:11:00 +02:00
..
2020-05-10 10:30:11 +02:00
2020-09-23 12:11:00 +02:00