Rama Aparna Mallavarapu 32b40b1ca7 perf: llcc: Fix the mask to clear and disable the LLCC PMU ...

The mask to clear the counters and to disable the monitor
seems to be incorrect. Fix the masks so that monitor is
properly disabled and saturated status of the counters is
cleared after they are read.

Change-Id: If3a999c92727ba05fbe4dbfa89b1aae41d3b78dc
Signed-off-by: Rama Aparna Mallavarapu <aparnam@codeaurora.org>

2019-07-18 15:57:37 -07:00

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hisilicon

drivers/perf: hisi: Fixup one DDRC PMU register offset

2019-01-13 09:51:10 +01:00

arm_dsu_pmu.c

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arm_pmu_acpi.c

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arm_pmu_platform.c

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arm_pmu.c

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arm_spe_pmu.c

perf/aux: Make perf_event accessible to setup_aux()

2019-04-05 22:33:11 +02:00

arm-cci.c

perf/arm-cci: Remove broken race mitigation

2019-05-31 06:46:17 -07:00

arm-ccn.c

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Kconfig

perf: Introduce a LLCC PMU

2019-01-18 10:48:33 -08:00

Makefile

perf: Introduce a LLCC PMU

2019-01-18 10:48:33 -08:00

qcom_l2_pmu.c

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qcom_l3_pmu.c

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qcom_llcc_pmu.c

perf: llcc: Fix the mask to clear and disable the LLCC PMU

2019-07-18 15:57:37 -07:00

xgene_pmu.c

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