1668c38ef2
[ Upstream commit e75d18cecbb3805895d8ed64da4f78575ec96043 ]
Though acpi_find_last_cache_level() always returned signed value and the
document states it will return any errors caused by lack of a PPTT table,
it never returned negative values before.
Commit 0c80f9e165f8 ("ACPI: PPTT: Leave the table mapped for the runtime usage")
however changed it by returning -ENOENT if no PPTT was found. The value
returned from acpi_find_last_cache_level() is then assigned to unsigned
fw_level.
It will result in the number of cache leaves calculated incorrectly as
a huge value which will then cause the following warning from __alloc_pages
as the order would be great than MAX_ORDER because of incorrect and huge
cache leaves value.
| WARNING: CPU: 0 PID: 1 at mm/page_alloc.c:5407 __alloc_pages+0x74/0x314
| Modules linked in:
| CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.19.0-10393-g7c2a8d3ac4c0 #73
| pstate: 20000005 (nzCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
| pc : __alloc_pages+0x74/0x314
| lr : alloc_pages+0xe8/0x318
| Call trace:
| __alloc_pages+0x74/0x314
| alloc_pages+0xe8/0x318
| kmalloc_order_trace+0x68/0x1dc
| __kmalloc+0x240/0x338
| detect_cache_attributes+0xe0/0x56c
| update_siblings_masks+0x38/0x284
| store_cpu_topology+0x78/0x84
| smp_prepare_cpus+0x48/0x134
| kernel_init_freeable+0xc4/0x14c
| kernel_init+0x2c/0x1b4
| ret_from_fork+0x10/0x20
Fix the same by changing fw_level to be signed integer and return the
error from init_cache_level() early in case of error.
Reported-and-Tested-by: Bruno Goncalves <bgoncalv@redhat.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Link: https://lore.kernel.org/r/20220808084640.3165368-1-sudeep.holla@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
106 lines
2.9 KiB
C
106 lines
2.9 KiB
C
/*
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* ARM64 cacheinfo support
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*
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* Copyright (C) 2015 ARM Ltd.
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/acpi.h>
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#include <linux/cacheinfo.h>
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#include <linux/of.h>
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#define MAX_CACHE_LEVEL 7 /* Max 7 level supported */
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/* Ctypen, bits[3(n - 1) + 2 : 3(n - 1)], for n = 1 to 7 */
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#define CLIDR_CTYPE_SHIFT(level) (3 * (level - 1))
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#define CLIDR_CTYPE_MASK(level) (7 << CLIDR_CTYPE_SHIFT(level))
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#define CLIDR_CTYPE(clidr, level) \
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(((clidr) & CLIDR_CTYPE_MASK(level)) >> CLIDR_CTYPE_SHIFT(level))
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static inline enum cache_type get_cache_type(int level)
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{
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u64 clidr;
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if (level > MAX_CACHE_LEVEL)
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return CACHE_TYPE_NOCACHE;
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clidr = read_sysreg(clidr_el1);
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return CLIDR_CTYPE(clidr, level);
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}
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static void ci_leaf_init(struct cacheinfo *this_leaf,
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enum cache_type type, unsigned int level)
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{
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this_leaf->level = level;
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this_leaf->type = type;
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}
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int init_cache_level(unsigned int cpu)
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{
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unsigned int ctype, level, leaves;
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int fw_level;
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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for (level = 1, leaves = 0; level <= MAX_CACHE_LEVEL; level++) {
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ctype = get_cache_type(level);
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if (ctype == CACHE_TYPE_NOCACHE) {
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level--;
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break;
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}
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/* Separate instruction and data caches */
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leaves += (ctype == CACHE_TYPE_SEPARATE) ? 2 : 1;
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}
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if (acpi_disabled)
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fw_level = of_find_last_cache_level(cpu);
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else
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fw_level = acpi_find_last_cache_level(cpu);
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if (fw_level < 0)
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return fw_level;
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if (level < fw_level) {
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/*
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* some external caches not specified in CLIDR_EL1
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* the information may be available in the device tree
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* only unified external caches are considered here
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*/
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leaves += (fw_level - level);
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level = fw_level;
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}
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this_cpu_ci->num_levels = level;
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this_cpu_ci->num_leaves = leaves;
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return 0;
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}
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int populate_cache_leaves(unsigned int cpu)
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{
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unsigned int level, idx;
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enum cache_type type;
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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struct cacheinfo *this_leaf = this_cpu_ci->info_list;
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for (idx = 0, level = 1; level <= this_cpu_ci->num_levels &&
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idx < this_cpu_ci->num_leaves; idx++, level++) {
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type = get_cache_type(level);
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if (type == CACHE_TYPE_SEPARATE) {
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ci_leaf_init(this_leaf++, CACHE_TYPE_DATA, level);
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ci_leaf_init(this_leaf++, CACHE_TYPE_INST, level);
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} else {
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ci_leaf_init(this_leaf++, type, level);
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}
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}
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return 0;
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}
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