Commit Graph

41 Commits

Author SHA1 Message Date
Greg Kroah-Hartman
2d76dea417 Merge 4.19.323 into android-4.19-stable
Changes in 4.19.323
	staging: iio: frequency: ad9833: Get frequency value statically
	staging: iio: frequency: ad9833: Load clock using clock framework
	staging: iio: frequency: ad9834: Validate frequency parameter value
	usbnet: ipheth: fix carrier detection in modes 1 and 4
	net: ethernet: use ip_hdrlen() instead of bit shift
	net: phy: vitesse: repair vsc73xx autonegotiation
	scripts: kconfig: merge_config: config files: add a trailing newline
	arm64: dts: rockchip: override BIOS_DISABLE signal via GPIO hog on RK3399 Puma
	net/mlx5: Update the list of the PCI supported devices
	net: ftgmac100: Enable TX interrupt to avoid TX timeout
	net: dpaa: Pad packets to ETH_ZLEN
	soundwire: stream: Revert "soundwire: stream: fix programming slave ports for non-continous port maps"
	selftests/vm: remove call to ksft_set_plan()
	selftests/kcmp: remove call to ksft_set_plan()
	ASoC: allow module autoloading for table db1200_pids
	pinctrl: at91: make it work with current gpiolib
	microblaze: don't treat zero reserved memory regions as error
	net: ftgmac100: Ensure tx descriptor updates are visible
	wifi: iwlwifi: mvm: fix iwl_mvm_max_scan_ie_fw_cmd_room()
	wifi: iwlwifi: mvm: don't wait for tx queues if firmware is dead
	ASoC: tda7419: fix module autoloading
	spi: bcm63xx: Enable module autoloading
	x86/hyperv: Set X86_FEATURE_TSC_KNOWN_FREQ when Hyper-V provides frequency
	ocfs2: add bounds checking to ocfs2_xattr_find_entry()
	ocfs2: strict bound check before memcmp in ocfs2_xattr_find_entry()
	gpio: prevent potential speculation leaks in gpio_device_get_desc()
	USB: serial: pl2303: add device id for Macrosilicon MS3020
	ACPI: PMIC: Remove unneeded check in tps68470_pmic_opregion_probe()
	wifi: ath9k: fix parameter check in ath9k_init_debug()
	wifi: ath9k: Remove error checks when creating debugfs entries
	netfilter: nf_tables: elements with timeout below CONFIG_HZ never expire
	wifi: cfg80211: fix UBSAN noise in cfg80211_wext_siwscan()
	wifi: cfg80211: fix two more possible UBSAN-detected off-by-one errors
	wifi: mac80211: use two-phase skb reclamation in ieee80211_do_stop()
	can: bcm: Clear bo->bcm_proc_read after remove_proc_entry().
	Bluetooth: btusb: Fix not handling ZPL/short-transfer
	block, bfq: fix possible UAF for bfqq->bic with merge chain
	block, bfq: choose the last bfqq from merge chain in bfq_setup_cooperator()
	block, bfq: don't break merge chain in bfq_split_bfqq()
	spi: ppc4xx: handle irq_of_parse_and_map() errors
	spi: ppc4xx: Avoid returning 0 when failed to parse and map IRQ
	ARM: versatile: fix OF node leak in CPUs prepare
	reset: berlin: fix OF node leak in probe() error path
	clocksource/drivers/qcom: Add missing iounmap() on errors in msm_dt_timer_init()
	hwmon: (max16065) Fix overflows seen when writing limits
	mtd: slram: insert break after errors in parsing the map
	hwmon: (ntc_thermistor) fix module autoloading
	power: supply: max17042_battery: Fix SOC threshold calc w/ no current sense
	fbdev: hpfb: Fix an error handling path in hpfb_dio_probe()
	drm/stm: Fix an error handling path in stm_drm_platform_probe()
	drm/amd: fix typo
	drm/amdgpu: Replace one-element array with flexible-array member
	drm/amdgpu: properly handle vbios fake edid sizing
	drm/radeon: Replace one-element array with flexible-array member
	drm/radeon: properly handle vbios fake edid sizing
	drm/rockchip: vop: Allow 4096px width scaling
	drm/radeon/evergreen_cs: fix int overflow errors in cs track offsets
	jfs: fix out-of-bounds in dbNextAG() and diAlloc()
	drm/msm/a5xx: properly clear preemption records on resume
	drm/msm/a5xx: fix races in preemption evaluation stage
	ipmi: docs: don't advertise deprecated sysfs entries
	drm/msm: fix %s null argument error
	xen: use correct end address of kernel for conflict checking
	xen/swiotlb: simplify range_straddles_page_boundary()
	xen/swiotlb: add alignment check for dma buffers
	selftests/bpf: Fix error compiling test_lru_map.c
	xz: cleanup CRC32 edits from 2018
	kthread: add kthread_work tracepoints
	kthread: fix task state in kthread worker if being frozen
	jbd2: introduce/export functions jbd2_journal_submit|finish_inode_data_buffers()
	ext4: clear EXT4_GROUP_INFO_WAS_TRIMMED_BIT even mount with discard
	smackfs: Use rcu_assign_pointer() to ensure safe assignment in smk_set_cipso
	ext4: avoid negative min_clusters in find_group_orlov()
	ext4: return error on ext4_find_inline_entry
	ext4: avoid OOB when system.data xattr changes underneath the filesystem
	nilfs2: fix potential null-ptr-deref in nilfs_btree_insert()
	nilfs2: determine empty node blocks as corrupted
	nilfs2: fix potential oob read in nilfs_btree_check_delete()
	perf sched timehist: Fix missing free of session in perf_sched__timehist()
	perf sched timehist: Fixed timestamp error when unable to confirm event sched_in time
	perf time-utils: Fix 32-bit nsec parsing
	clk: rockchip: Set parent rate for DCLK_VOP clock on RK3228
	drivers: media: dvb-frontends/rtl2832: fix an out-of-bounds write error
	drivers: media: dvb-frontends/rtl2830: fix an out-of-bounds write error
	PCI: xilinx-nwl: Fix register misspelling
	RDMA/iwcm: Fix WARNING:at_kernel/workqueue.c:#check_flush_dependency
	pinctrl: single: fix missing error code in pcs_probe()
	clk: ti: dra7-atl: Fix leak of of_nodes
	pinctrl: mvebu: Fix devinit_dove_pinctrl_probe function
	RDMA/cxgb4: Added NULL check for lookup_atid
	ntb: intel: Fix the NULL vs IS_ERR() bug for debugfs_create_dir()
	nfsd: call cache_put if xdr_reserve_space returns NULL
	f2fs: enhance to update i_mode and acl atomically in f2fs_setattr()
	f2fs: fix typo
	f2fs: fix to update i_ctime in __f2fs_setxattr()
	f2fs: remove unneeded check condition in __f2fs_setxattr()
	f2fs: reduce expensive checkpoint trigger frequency
	coresight: tmc: sg: Do not leak sg_table
	netfilter: nf_reject_ipv6: fix nf_reject_ip6_tcphdr_put()
	net: seeq: Fix use after free vulnerability in ether3 Driver Due to Race Condition
	tcp: introduce tcp_skb_timestamp_us() helper
	tcp: check skb is non-NULL in tcp_rto_delta_us()
	net: qrtr: Update packets cloning when broadcasting
	netfilter: ctnetlink: compile ctnetlink_label_size with CONFIG_NF_CONNTRACK_EVENTS
	crypto: aead,cipher - zeroize key buffer after use
	Remove *.orig pattern from .gitignore
	soc: versatile: integrator: fix OF node leak in probe() error path
	USB: appledisplay: close race between probe and completion handler
	USB: misc: cypress_cy7c63: check for short transfer
	firmware_loader: Block path traversal
	tty: rp2: Fix reset with non forgiving PCIe host bridges
	drbd: Fix atomicity violation in drbd_uuid_set_bm()
	drbd: Add NULL check for net_conf to prevent dereference in state validation
	ACPI: sysfs: validate return type of _STR method
	f2fs: prevent possible int overflow in dir_block_index()
	f2fs: avoid potential int overflow in sanity_check_area_boundary()
	vfs: fix race between evice_inodes() and find_inode()&iput()
	fs: Fix file_set_fowner LSM hook inconsistencies
	nfs: fix memory leak in error path of nfs4_do_reclaim
	PCI: xilinx-nwl: Use irq_data_get_irq_chip_data()
	PCI: xilinx-nwl: Fix off-by-one in INTx IRQ handler
	soc: versatile: realview: fix memory leak during device remove
	soc: versatile: realview: fix soc_dev leak during device remove
	usb: yurex: Replace snprintf() with the safer scnprintf() variant
	USB: misc: yurex: fix race between read and write
	pps: remove usage of the deprecated ida_simple_xx() API
	pps: add an error check in parport_attach
	i2c: aspeed: Update the stop sw state when the bus recovery occurs
	i2c: isch: Add missed 'else'
	usb: yurex: Fix inconsistent locking bug in yurex_read()
	mailbox: rockchip: fix a typo in module autoloading
	mailbox: bcm2835: Fix timeout during suspend mode
	ceph: remove the incorrect Fw reference check when dirtying pages
	netfilter: uapi: NFTA_FLOWTABLE_HOOK is NLA_NESTED
	netfilter: nf_tables: prevent nf_skb_duplicated corruption
	r8152: Factor out OOB link list waits
	net: ethernet: lantiq_etop: fix memory disclosure
	net: avoid potential underflow in qdisc_pkt_len_init() with UFO
	net: add more sanity checks to qdisc_pkt_len_init()
	ipv4: ip_gre: Fix drops of small packets in ipgre_xmit
	sctp: set sk_state back to CLOSED if autobind fails in sctp_listen_start
	ALSA: hda/generic: Unconditionally prefer preferred_dacs pairs
	ALSA: hda/conexant: Fix conflicting quirk for System76 Pangolin
	f2fs: Require FMODE_WRITE for atomic write ioctls
	wifi: ath9k: fix possible integer overflow in ath9k_get_et_stats()
	wifi: ath9k_htc: Use __skb_set_length() for resetting urb before resubmit
	net: hisilicon: hip04: fix OF node leak in probe()
	net: hisilicon: hns_dsaf_mac: fix OF node leak in hns_mac_get_info()
	net: hisilicon: hns_mdio: fix OF node leak in probe()
	ACPICA: Fix memory leak if acpi_ps_get_next_namepath() fails
	ACPICA: Fix memory leak if acpi_ps_get_next_field() fails
	ACPI: EC: Do not release locks during operation region accesses
	ACPICA: check null return of ACPI_ALLOCATE_ZEROED() in acpi_db_convert_to_package()
	tipc: guard against string buffer overrun
	net: mvpp2: Increase size of queue_name buffer
	ipv4: Check !in_dev earlier for ioctl(SIOCSIFADDR).
	ipv4: Mask upper DSCP bits and ECN bits in NETLINK_FIB_LOOKUP family
	tcp: avoid reusing FIN_WAIT2 when trying to find port in connect() process
	ACPICA: iasl: handle empty connection_node
	wifi: mwifiex: Fix memcpy() field-spanning write warning in mwifiex_cmd_802_11_scan_ext()
	signal: Replace BUG_ON()s
	ALSA: asihpi: Fix potential OOB array access
	ALSA: hdsp: Break infinite MIDI input flush loop
	fbdev: pxafb: Fix possible use after free in pxafb_task()
	power: reset: brcmstb: Do not go into infinite loop if reset fails
	ata: sata_sil: Rename sil_blacklist to sil_quirks
	jfs: UBSAN: shift-out-of-bounds in dbFindBits
	jfs: Fix uaf in dbFreeBits
	jfs: check if leafidx greater than num leaves per dmap tree
	jfs: Fix uninit-value access of new_ea in ea_buffer
	drm/amd/display: Check stream before comparing them
	drm/amd/display: Fix index out of bounds in degamma hardware format translation
	drm/printer: Allow NULL data in devcoredump printer
	scsi: aacraid: Rearrange order of struct aac_srb_unit
	drm/radeon/r100: Handle unknown family in r100_cp_init_microcode()
	of/irq: Refer to actual buffer size in of_irq_parse_one()
	ext4: ext4_search_dir should return a proper error
	ext4: fix i_data_sem unlock order in ext4_ind_migrate()
	spi: s3c64xx: fix timeout counters in flush_fifo
	selftests: breakpoints: use remaining time to check if suspend succeed
	selftests: vDSO: fix vDSO symbols lookup for powerpc64
	i2c: xiic: Wait for TX empty to avoid missed TX NAKs
	spi: bcm63xx: Fix module autoloading
	perf/core: Fix small negative period being ignored
	parisc: Fix itlb miss handler for 64-bit programs
	ALSA: core: add isascii() check to card ID generator
	ext4: no need to continue when the number of entries is 1
	ext4: propagate errors from ext4_find_extent() in ext4_insert_range()
	ext4: fix incorrect tid assumption in __jbd2_log_wait_for_space()
	ext4: aovid use-after-free in ext4_ext_insert_extent()
	ext4: fix double brelse() the buffer of the extents path
	ext4: fix incorrect tid assumption in ext4_wait_for_tail_page_commit()
	parisc: Fix 64-bit userspace syscall path
	of/irq: Support #msi-cells=<0> in of_msi_get_domain
	jbd2: stop waiting for space when jbd2_cleanup_journal_tail() returns error
	ocfs2: fix the la space leak when unmounting an ocfs2 volume
	ocfs2: fix uninit-value in ocfs2_get_block()
	ocfs2: reserve space for inline xattr before attaching reflink tree
	ocfs2: cancel dqi_sync_work before freeing oinfo
	ocfs2: remove unreasonable unlock in ocfs2_read_blocks
	ocfs2: fix null-ptr-deref when journal load failed.
	ocfs2: fix possible null-ptr-deref in ocfs2_set_buffer_uptodate
	riscv: define ILLEGAL_POINTER_VALUE for 64bit
	aoe: fix the potential use-after-free problem in more places
	clk: rockchip: fix error for unknown clocks
	media: uapi/linux/cec.h: cec_msg_set_reply_to: zero flags
	media: venus: fix use after free bug in venus_remove due to race condition
	iio: magnetometer: ak8975: Fix reading for ak099xx sensors
	tomoyo: fallback to realpath if symlink's pathname does not exist
	Input: adp5589-keys - fix adp5589_gpio_get_value()
	btrfs: wait for fixup workers before stopping cleaner kthread during umount
	gpio: davinci: fix lazy disable
	ext4: avoid ext4_error()'s caused by ENOMEM in the truncate path
	ext4: fix slab-use-after-free in ext4_split_extent_at()
	ext4: update orig_path in ext4_find_extent()
	arm64: Add Cortex-715 CPU part definition
	arm64: cputype: Add Neoverse-N3 definitions
	arm64: errata: Expand speculative SSBS workaround once more
	uprobes: fix kernel info leak via "[uprobes]" vma
	nfsd: use ktime_get_seconds() for timestamps
	nfsd: fix delegation_blocked() to block correctly for at least 30 seconds
	rtc: at91sam9: drop platform_data support
	rtc: at91sam9: fix OF node leak in probe() error path
	ACPI: battery: Simplify battery hook locking
	ACPI: battery: Fix possible crash when unregistering a battery hook
	ext4: fix inode tree inconsistency caused by ENOMEM
	net: ethernet: cortina: Drop TSO support
	tracing: Remove precision vsnprintf() check from print event
	drm: Move drm_mode_setcrtc() local re-init to failure path
	drm/crtc: fix uninitialized variable use even harder
	virtio_console: fix misc probe bugs
	Input: synaptics-rmi4 - fix UAF of IRQ domain on driver removal
	bpf: Check percpu map value size first
	s390/facility: Disable compile time optimization for decompressor code
	s390/mm: Add cond_resched() to cmm_alloc/free_pages()
	ext4: nested locking for xattr inode
	s390/cpum_sf: Remove WARN_ON_ONCE statements
	ktest.pl: Avoid false positives with grub2 skip regex
	clk: bcm: bcm53573: fix OF node leak in init
	i2c: i801: Use a different adapter-name for IDF adapters
	PCI: Mark Creative Labs EMU20k2 INTx masking as broken
	media: videobuf2-core: clear memory related fields in __vb2_plane_dmabuf_put()
	usb: chipidea: udc: enable suspend interrupt after usb reset
	tools/iio: Add memory allocation failure check for trigger_name
	driver core: bus: Return -EIO instead of 0 when show/store invalid bus attribute
	fbdev: sisfb: Fix strbuf array overflow
	NFS: Remove print_overflow_msg()
	SUNRPC: Fix integer overflow in decode_rc_list()
	tcp: fix tcp_enter_recovery() to zero retrans_stamp when it's safe
	netfilter: br_netfilter: fix panic with metadata_dst skb
	Bluetooth: RFCOMM: FIX possible deadlock in rfcomm_sk_state_change
	gpio: aspeed: Add the flush write to ensure the write complete.
	clk: Add (devm_)clk_get_optional() functions
	clk: generalize devm_clk_get() a bit
	clk: Provide new devm_clk helpers for prepared and enabled clocks
	gpio: aspeed: Use devm_clk api to manage clock source
	igb: Do not bring the device up after non-fatal error
	net: ibm: emac: mal: fix wrong goto
	ppp: fix ppp_async_encode() illegal access
	net: ipv6: ensure we call ipv6_mc_down() at most once
	CDC-NCM: avoid overflow in sanity checking
	HID: plantronics: Workaround for an unexcepted opposite volume key
	Revert "usb: yurex: Replace snprintf() with the safer scnprintf() variant"
	usb: xhci: Fix problem with xhci resume from suspend
	usb: storage: ignore bogus device raised by JieLi BR21 USB sound chip
	net: Fix an unsafe loop on the list
	posix-clock: Fix missing timespec64 check in pc_clock_settime()
	arm64: probes: Remove broken LDR (literal) uprobe support
	arm64: probes: Fix simulate_ldr*_literal()
	PCI: Add function 0 DMA alias quirk for Glenfly Arise chip
	fat: fix uninitialized variable
	KVM: Fix a data race on last_boosted_vcpu in kvm_vcpu_on_spin()
	net: dsa: mv88e6xxx: Fix out-of-bound access
	s390/sclp_vt220: Convert newlines to CRLF instead of LFCR
	KVM: s390: Change virtual to physical address access in diag 0x258 handler
	x86/cpufeatures: Define X86_FEATURE_AMD_IBPB_RET
	drm/vmwgfx: Handle surface check failure correctly
	iio: dac: stm32-dac-core: add missing select REGMAP_MMIO in Kconfig
	iio: adc: ti-ads8688: add missing select IIO_(TRIGGERED_)BUFFER in Kconfig
	iio: hid-sensors: Fix an error handling path in _hid_sensor_set_report_latency()
	iio: light: opt3001: add missing full-scale range value
	Bluetooth: Remove debugfs directory on module init failure
	Bluetooth: btusb: Fix regression with fake CSR controllers 0a12:0001
	xhci: Fix incorrect stream context type macro
	USB: serial: option: add support for Quectel EG916Q-GL
	USB: serial: option: add Telit FN920C04 MBIM compositions
	parport: Proper fix for array out-of-bounds access
	x86/apic: Always explicitly disarm TSC-deadline timer
	nilfs2: propagate directory read errors from nilfs_find_entry()
	clk: Fix pointer casting to prevent oops in devm_clk_release()
	clk: Fix slab-out-of-bounds error in devm_clk_release()
	RDMA/bnxt_re: Fix incorrect AVID type in WQE structure
	RDMA/cxgb4: Fix RDMA_CM_EVENT_UNREACHABLE error for iWARP
	RDMA/bnxt_re: Return more meaningful error
	drm/msm/dsi: fix 32-bit signed integer extension in pclk_rate calculation
	macsec: don't increment counters for an unrelated SA
	net: ethernet: aeroflex: fix potential memory leak in greth_start_xmit_gbit()
	net: systemport: fix potential memory leak in bcm_sysport_xmit()
	usb: typec: altmode should keep reference to parent
	Bluetooth: bnep: fix wild-memory-access in proto_unregister
	arm64:uprobe fix the uprobe SWBP_INSN in big-endian
	arm64: probes: Fix uprobes for big-endian kernels
	KVM: s390: gaccess: Refactor gpa and length calculation
	KVM: s390: gaccess: Refactor access address range check
	KVM: s390: gaccess: Cleanup access to guest pages
	KVM: s390: gaccess: Check if guest address is in memslot
	udf: fix uninit-value use in udf_get_fileshortad
	jfs: Fix sanity check in dbMount
	net/sun3_82586: fix potential memory leak in sun3_82586_send_packet()
	be2net: fix potential memory leak in be_xmit()
	net: usb: usbnet: fix name regression
	posix-clock: posix-clock: Fix unbalanced locking in pc_clock_settime()
	ALSA: hda/realtek: Update default depop procedure
	drm/amd: Guard against bad data for ATIF ACPI method
	ACPI: button: Add DMI quirk for Samsung Galaxy Book2 to fix initial lid detection issue
	nilfs2: fix kernel bug due to missing clearing of buffer delay flag
	hv_netvsc: Fix VF namespace also in synthetic NIC NETDEV_REGISTER event
	selinux: improve error checking in sel_write_load()
	arm64/uprobes: change the uprobe_opcode_t typedef to fix the sparse warning
	xfrm: validate new SA's prefixlen using SA family when sel.family is unset
	usb: dwc3: remove generic PHY calibrate() calls
	usb: dwc3: Add splitdisable quirk for Hisilicon Kirin Soc
	usb: dwc3: core: Stop processing of pending events if controller is halted
	cgroup: Fix potential overflow issue when checking max_depth
	wifi: mac80211: skip non-uploaded keys in ieee80211_iter_keys
	gtp: simplify error handling code in 'gtp_encap_enable()'
	gtp: allow -1 to be specified as file description from userspace
	net/sched: stop qdisc_tree_reduce_backlog on TC_H_ROOT
	bpf: Fix out-of-bounds write in trie_get_next_key()
	net: support ip generic csum processing in skb_csum_hwoffload_help
	net: skip offload for NETIF_F_IPV6_CSUM if ipv6 header contains extension
	netfilter: nft_payload: sanitize offset and length before calling skb_checksum()
	firmware: arm_sdei: Fix the input parameter of cpuhp_remove_state()
	net: amd: mvme147: Fix probe banner message
	misc: sgi-gru: Don't disable preemption in GRU driver
	usbip: tools: Fix detach_port() invalid port error path
	usb: phy: Fix API devm_usb_put_phy() can not release the phy
	xhci: Fix Link TRB DMA in command ring stopped completion event
	Revert "driver core: Fix uevent_show() vs driver detach race"
	wifi: mac80211: do not pass a stopped vif to the driver in .get_txpower
	wifi: ath10k: Fix memory leak in management tx
	wifi: iwlegacy: Clear stale interrupts before resuming device
	nilfs2: fix potential deadlock with newly created symlinks
	ocfs2: pass u64 to ocfs2_truncate_inline maybe overflow
	nilfs2: fix kernel bug due to missing clearing of checked flag
	mm: shmem: fix data-race in shmem_getattr()
	vt: prevent kernel-infoleak in con_font_get()
	Linux 4.19.323

Change-Id: I2348f834187153067ab46b3b48b8fe7da9cee1f1
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
2024-11-09 11:24:17 +00:00
Sebastian Reichel
2f1e1a9047 clk: rockchip: fix error for unknown clocks
commit 12fd64babaca4dc09d072f63eda76ba44119816a upstream.

There is a clk == NULL check after the switch to check for
unsupported clk types. Since clk is re-assigned in a loop,
this check is useless right now for anything but the first
round. Let's fix this up by assigning clk = NULL in the
loop before the switch statement.

Fixes: a245fecbb8 ("clk: rockchip: add basic infrastructure for clock branches")
Cc: stable@vger.kernel.org
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
[added fixes + stable-cc]
Link: https://lore.kernel.org/r/20240325193609.237182-6-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-11-08 16:19:15 +01:00
Saravana Kannan
2071154513 ANDROID: GKI: clk: Initialize in stack clk_init_data to 0 in all drivers
This allows adding fields to clk_init_data without having to explicitly
set those fields in all the drivers.

Bug: 150506629
Signed-off-by: Saravana Kannan <saravanak@google.com>
Change-Id: I0ff4e5108541b9f6e3e3e3f984a277b6954a629c
2020-04-02 18:04:21 -07:00
Elaine Zhang
956060a527 clk: rockchip: add support for half divider
The new Rockchip socs have optional half divider:
The formula is shown as:
	freq_out = 2*freq_in / (2*div + 3)
Is this the same for all of new SoCs.

So we use "branch_half_divider" + "COMPOSITE_NOMUX_HALFDIV \
DIV_HALF \ COMPOSITE_HALFDIV \ CMPOSITE_NOGATE_HALFDIV"
to hook that special divider clock-type into our clock-tree.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-07-06 19:17:57 +02:00
Yisheng Xie
a425702f68 clk: rockchip: use match_string() helper
match_string() returns the index of an array for a matching string,
which can be used intead of open coded variant.

Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-clk@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: Yisheng Xie <xieyisheng1@huawei.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-05-22 13:32:09 +02:00
Shawn Lin
fd3cbbfb76 clk: rockchip: Free the memory on the error path
rockchip_clk_register_branch() and rockchip_clk_register_frac_branch()
should free the memory internally when seeing any failure.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-03-02 08:51:03 +01:00
Stephen Boyd
1dfcfa721f clk: rockchip: Mark rockchip_fractional_approximation static
Silence the sparse warning

clk/rockchip/clk.c:172:6: warning: symbol 'rockchip_fractional_approximation' was not declared. Should it be static?

Cc: Elaine Zhang <zhangqing@rock-chips.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-08-23 15:35:41 -07:00
Elaine Zhang
5d890c2df9 clk: rockchip: add special approximation to fix up fractional clk's jitter
>From Rockchips fractional divider description:
  3.1.9  Fractional divider usage
  To get specific frequency, clocks of I2S, SPDIF, UARTcan be generated by
  fractional divider. Generally you must set that denominator is 20 times
  larger than numerator to generate precise clock frequency. So the
  fractional divider applies only to generate low frequency clock like
  I2S, UART.

Therefore add a special approximation function that handles this
special requirement.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-08 17:45:42 +02:00
Douglas Anderson
8118fe40d4 clk: rockchip: Remove useless init of "grf" to -EPROBE_DEFER
When we used to defer setting the "grf" member to
rockchip_clk_get_grf() it was important to init the "grf" member to an
error value in rockchip_clk_init().  With recent changes, we now set
"grf" right in rockchip_clk_init() (two lines below the place where we
initted it).  That makes the old init useless.  Get rid of it.

Fixes: 6f339dc271 ("clk: rockchip: lookup General Register Files in rockchip_clk_init")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-01-06 18:08:16 +01:00
Heiko Stuebner
cb1d9f6dda clk: rockchip: add a clock-type for muxes based in the grf
Rockchip socs often have some tiny number of muxes not controlled from
the core clock controller but through bits set in the general register
files. Add a clock-type that can control these as well, so that we
don't need to work around them being absent.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-01-02 14:24:57 +01:00
Lin Huang
a4f182bf81 clk: rockchip: add new clock-type for the ddrclk
Changing the rate of the DDR clock needs special care, as the DDR
is of course in use and will react badly if the rate changes under it.

Over time different approaches to handle that were used.

Past SoCs like the rk3288 and before would store some code in SRAM
while the rk3368 used a SCPI variant and let a coprocessor handle that.

New rockchip platforms like the rk3399 have a dcf controller to do ddr
frequency scaling, and support for this controller will be implemented
in the arm-trusted-firmware.

This new clock-type should over time handle all these methods for
handling DDR rate changes, but right now it will concentrate on the
SIP interface used to talk to ARM trusted firmware.

The SIP interface counterpart was merged from pull-request #684 [0]
into the upstream arm-trusted-firmware codebase.

[0] https://github.com/ARM-software/arm-trusted-firmware/pull/684

Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-09-01 11:23:56 +02:00
Heiko Stübner
e6cebc7273 clk: rockchip: use general clock flag when registering pll
Add the general flags the pll list already contains to the clock init,
so that needed clock flags can be used for plls.

Signed-off-by: Heiko Stübner <heiko@sntech.de>
2016-08-08 10:57:21 +02:00
Heiko Stuebner
c9c3c6eecc clk: rockchip: simplify GRF handling in pll clocks
With the previous commit, the clock drivers now know at init time if the
GRF regmap is available. That means if it isn't available then, it also
won't become available later and we can therefore switch PLLs, that need
the GRF for the lock-status, to read-only mode - similar behaviour as the
aborting of rate changes we did before.

This saves some conditionals on every rate change and we can also drop
the rockchip_clk_get_grf function completely.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-05-09 16:04:15 +02:00
Heiko Stuebner
6f339dc271 clk: rockchip: lookup General Register Files in rockchip_clk_init
In the distant past syscons were initialized pretty late and weren't
available at the time the clock init ran. As the GRF is mainly needed
for PLL lock-status checking, we had this lazy init that tried to grab
the syscon on PLL rate changes and denied these changes if it was not
available.

These days syscons are available very early and recent addition to
rockchip clocks, like the PLL clk_init actually also rely on them
being available at that time, so there is no need to keep that lazy
init around, as it will also result in some more simplifications in
other parts of the clock-code.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-05-09 16:04:11 +02:00
Heiko Stuebner
03ae174786 clk: rockchip: fix checkpatch warning in core code
We seem to have accumulated a bunch of checkpatch warnings, with mainly
overlong lines and two unnecessary allocation error messages.
Most were introduced with the recent multi-controller-support but some
were quite a bit older.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-04-20 09:53:39 +02:00
Shawn Lin
ff1ae20961 clk: rockchip: remove redundant checking of device_node
rockchip_clk_of_add_provider is used by sub-clk driver which
already call of_iomap before calling it. If device_node does
not exist, of_iomap returns NULL which will fail to init the
sub-clk driver. So really it's redundant.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-03-27 13:03:35 +02:00
Xing Zheng
ef1d9feecc clk: rockchip: Add support for multiple clock providers
There are need to support Multi-CRUs probability in future, but
it is not supported on the current Rockchip Clock Framework.

Therefore, this patch add support a provider as the parameter
handler when we call the clock register functions for per CRU.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-03-27 13:03:34 +02:00
Michael Turquette
70750ff2c9 Merge tag 'v4.6-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Introduction of a factor type and a variant containing a gate
to be able to also declare factor clocks in their correct
place in the clock tree instead of having to register factor
clocks in the init callback separately. And as always some more
clock-ids and non-regression fixes for mistakes introduced in
past kernel releases.
2016-02-15 11:59:45 -08:00
Heiko Stuebner
29a30c269a clk: rockchip: add a factor clock type
Add a clock type for fixed factor clocks. This allows us to define fixed
factor clocks where they appear in the clock hierarchy instead of in the
init function.

The additional factor_gate type, finally allows us to model some last
parts of the clock tree correctly.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-02-04 15:49:09 +01:00
Shawn Lin
2467b6745e clk: rockchip: free memory in error cases when registering clock branches
Add free memeory if rockchip_clk_register_branch fails.

Fixes: a245fecbb8 ("clk: rockchip: add basic infrastructure...")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2016-02-02 22:09:50 +01:00
Heiko Stuebner
5035981979 clk-divider: make sure read-only dividers do not write to their register
Commit e6d5e7d90b ("clk-divider: Fix READ_ONLY when divider > 1") removed
the special ops struct for read-only clocks and instead opted to handle
them inside the regular ops.

On the rk3368 this results in breakage as aclkm now gets set a value.
While it is the same divider value, the A53 core still doesn't like it,
which can result in the cpu ending up in a hang.
The reason being that "ACLKENMasserts one clock cycle before the rising
edge of ACLKM" and the clock should only be touched when STANDBYWFIL2
is asserted.

To fix this, reintroduce the read-only ops but do include the round_rate
callback. That way no writes that may be unsafe are done to the divider
register in any case.

The Rockchip use of the clk_divider_ops is adapted to this split again,
as is the nxp, lpc18xx-ccu driver that was included since the original
commit. On lpc18xx-ccu the divider seems to always be read-only
so only uses the new ops now.

Fixes: e6d5e7d90b ("clk-divider: Fix READ_ONLY when divider > 1")
Reported-by: Zhang Qing <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-01-29 12:44:37 -08:00
Michael Turquette
a915e30dd2 Merge branch 'clk-rockchip' into clk-next 2015-12-23 13:08:56 -08:00
Heiko Stuebner
8ca1ca8f60 clk: rockchip: handle mux dependency of fractional dividers
The fractional dividers of Rockchip SoCs contain an "auto-gating-feature"
that requires the downstream mux to actually point to the fractional
divider and the fractional divider gate to be enabled, for it to really
accept changes to the divider ratio.

The downstream muxes themselfs are not generic enough to include them
directly into the fractional divider, as they have varying sources of
parent clocks including not only clocks related to the fractional
dividers but other clocks as well.

To solve this, allow our clock branches to specify direct child clock-
branches in the new child property, let the fractional divider register
its downstream mux through this and add a clock notifier that temporarily
switches the mux setting when it notices rate changes to the fractional
divider.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-12-23 12:57:29 -08:00
Heiko Stuebner
dfff24bde7 clk: rockchip: only enter pll slow-mode directly before reboots on rk3288
As commit 1d33929e2a ("clk: rockchip: switch PLLs to slow mode before
reboot for rk3288") states, switching the PLLs to slow-mode is only
necessary when rebooting using the soft-reset done through the CRU.

The dwc2 controllers used create really big number of interrupts in
special constellations involving usb-hubs and their number is so high,
it can even overwhelm the interrupt handler if the cpu-speed os to low.

Right now the PLLs are put into slow-mode in a shutdown syscore_ops
callback which means it happens on all reboots (not only the soft-reset
ones) and even on poweroff actions.

This can result in the system not powering off and getting stuck instead,
so we should move the slow-mode change nearer to the actual reboot action.

For this we introduce the possiblity to also set a callback that gets
called from the restart-handler directly prior to restarting the system
and move the shutdown-callback to this new option.

With this the slow-mode switch is done only on the necessary reboots
and also has a smaller possibility of causing artifacts.

Fixes: 1d33929e2a ("clk: rockchip: switch PLLs to slow mode before reboot for rk3288")
Signed-off-by: Heiko Stuebner <heiko.stuebner@collabora.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
2015-12-21 02:01:19 +01:00
Andy Shevchenko
5d49a6e103 clk: rockchip: save width in struct clk_fractional_divider
The ->mwidth and ->nwidth fields will be used by clk-fractional-divider when it
will be switched to rational base approximation algorithm.

Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-10-02 11:29:47 -07:00
Heiko Stuebner
8a76f443a9 clk: rockchip: add support for phase inverters
Most Rockchip socs have optional phase inverters connected to some
clocks that move the clock-phase by 180 degrees.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[sboyd@codeaurora.org: Dropped lazy part of commit text]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-06 15:04:40 -07:00
Uwe Kleine-König
4a1caed3d0 clk: make several parent names const
Since commit 2893c37946 ("clk: make strings in parent name arrays
const") the name of parent clocks can be const. So add more const in
several clock drivers.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-06-04 14:27:06 -07:00
Uwe Kleine-König
692d8328e8 clk: don't use __initconst for non-const arrays
The statement

	static const char *name[];

defines a modifiable array of pointers to constant chars. That is

	*name[0] = 'f';

is forbidden, but

	name[0] = "f";

is not. So marking an array that is defined as above with __initconst is
wrong. Either an additional const must be added such that the whole
definition reads:

	static const char *const name[] __initconst;

or where this is not possible __initdata must be used.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
2015-04-12 17:18:27 -07:00
Michael Turquette
b572b5f821 Merge tag 'v3.19-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
- clock phase setting capability for the rk3288 mmc clocks
- pll init to allow syncing to actual rate table values
- some more exported clocks
- fixes for some clocks (typos etc) all of them not yet used
  in actual drivers
2014-11-28 21:00:16 -08:00
Alexandru M Stan
89bf26cbc1 clk: rockchip: Add support for the mmc clock phases using the framework
This patch adds the 2 physical clocks for the mmc (drive and sample). They're
mostly there for the phase properties, but they also show the true clock
(by dividing by RK3288_MMC_CLKGEN_DIV).

The drive and sample phases are generated by dividing an upstream parent clock
by 2, this allows us to adjust the phase by 90 deg.

There's also an option to have up to 255 delay elements (40-80 picoseconds long).
This driver uses those elements (under the assumption that they're 60 ps long)
to generate approximate 22.5 degrees options. 67.5 (22.5*3) might be as high as
90 deg if the delay elements are as big as 80 ps, so a finer division (smaller
than 22.5) was not picked because the phase might not be monotonic anymore.

Suggested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-11-28 00:44:24 +01:00
Heiko Stuebner
4f8a7c549f clk: rockchip: add ability to specify pll-specific flags
This adds a flag parameter to plls that allows us to create
special flags to tweak the behaviour of the plls if necessary.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
2014-11-25 09:57:07 +01:00
Michael Turquette
da57b46010 Merge branch 'clk-fixes' into clk-next 2014-11-24 17:45:33 -08:00
James Hogan
e6d5e7d90b clk-divider: Fix READ_ONLY when divider > 1
Commit 79c6ab5095 (clk: divider: add CLK_DIVIDER_READ_ONLY flag) in
v3.16 introduced the CLK_DIVIDER_READ_ONLY flag which caused the
recalc_rate() and round_rate() clock callbacks to be omitted.

However using this flag has the unfortunate side effect of causing the
clock recalculation code when a clock rate change is attempted to always
treat it as a pass-through clock, i.e. with a fixed divide of 1, which
may not be the case. Child clock rates are then recalculated using the
wrong parent rate.

Therefore instead of dropping the recalc_rate() and round_rate()
callbacks, alter clk_divider_bestdiv() to always report the current
divider as the best divider so that it is never altered.

For me the read only clock was the system clock, which divided the PLL
rate by 2, from which both the UART and the SPI clocks were divided.
Initial setting of the UART rate set it correctly, but when the SPI
clock was set, the other child clocks were miscalculated. The UART clock
was recalculated using the PLL rate as the parent rate, resulting in a
UART new_rate of double what it should be, and a UART which spewed forth
garbage when the rate changes were propagated.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: Max Schwarz <max.schwarz@online.de>
Cc: <stable@vger.kernel.org> # v3.16+
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-11-17 11:13:52 -08:00
Kever Yang
78eaf6095c clk: rockchip: disable unused clocks
The rockchip clock driver use CLK_IGNORE_UNUSED flag to make sure
all the clocks are available like default power on state.
We have implement the clock manage in most of rockchip drivers,
it is time to remove it for power save.
Instead we add CLK_IGNORE_UNUSED for some clock nodes which should
be on during boot or no module driver in kernel will initialize it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-11-04 22:52:51 +01:00
Heiko Stübner
6f1294b5a8 clk: rockchip: add restart handler
Add infrastructure to write the correct value to the restart register and
register the restart notifier for both rk3188 (including rk3066) and rk3288.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2014-10-01 14:11:42 +02:00
Heiko Stuebner
f6fba5f696 clk: rockchip: add new clock-type for the cpuclk
When changing the armclk on Rockchip SoCs it is supposed to be reparented
to an alternate parent before changing the underlying pll and back after
the change. Additionally there exist clocks that are very tightly bound to
the armclk whose divider values are set according to the armclk rate.

Add a special clock-type to handle all that. The rate table and divider
values will be supplied from the soc-specific clock controllers.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
On a rk3288-board:
Tested-by: Doug Anderson <dianders@chromium.org>
2014-09-27 17:57:41 +02:00
Heiko Stübner
fe94f974e9 clk: rockchip: protect critical clocks from getting disabled
The clock-tree contains clocks that should never get disabled automatically.
One example are the base ACLKs, the base supplies for all peripherals.

Therefore add a structure similar to the sunxi clock-tree to protect these
special clocks from being disabled.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Doug Anderson <dianders@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-09-02 15:03:18 -07:00
Heiko Stübner
1a4b181995 clk: rockchip: make rockchip_clk_register_branch static
It is only used locally in clk/rockchip/clk.c and thus can be static.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-09-02 15:03:17 -07:00
Heiko Stübner
b2155a71a7 clk: rockchip: implement the fraction divider branch type
Rockchip SoCs may provide fraction dividers for some clocks, mostly for
i2s and uarts. In contrast to the other registers, these do not use
the hiword-mask paradigm, but instead split the register into the upper
16 bit for the nominator and the lower 16 bit for the denominator.

The common clock framework got a generic fractional divider clock type
recently that can accomodate this setting easily. All currently known
fraction dividers have a separate gate too, therefore implement the
divider as composite using the ops-struct from fractional_divider clock
and add the gate if necessary.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-09-02 15:03:17 -07:00
Heiko Stübner
90c5902540 clk: rockchip: add clock type for pll clocks and pll used on rk3066
All known Rockchip SoCs down to the RK28xx (ARM9) use a similar pattern to
handle their plls:
                       |--\
xin32k ----------------|mux\
xin24m -----| pll |----|pll|--- pll output
       \---------------|src/
                       |--/

The pll output is sourced from 1 of 3 sources, the actual pll being one of
them. To change the pll frequency it is imperative to remux it to another
source beforehand. This is done by adding a clock-listener to the pll that
handles the remuxing before and after the rate change.

The output mux is implemented as a separate clock to make use of already
existing common-clock features for disabling the pll if one of the other
two sources is used.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-07-13 12:17:06 -07:00
Heiko Stübner
a245fecbb8 clk: rockchip: add basic infrastructure for clock branches
This adds infrastructure for registering clock branches. On Rockchip SoCs
most clock branches are a combination of mux,divider and gate components,
thus a composite clock is used when appropriate.

Clock branches are supposed to be declared in an array using the COMPOSITE*
or MUX, etc makros defined in the header and then registered using
rockchip_clk_register_branches.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-07-13 12:17:06 -07:00