TechPanelGM/kernel_xiaomi_sm8250
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Revert "iommu: Add msm_iommu_ops for qcom specific IOMMU ops"

Browse Source 
This reverts commit bf2f3f957b.
The structures that were added were not used, so remove them.

Change-Id: Ib29f770bc44c538d3242544477477c8390b83a54
Signed-off-by: Isaac J. Manjarres <isaacm@codeaurora.org>
This commit is contained in:
Isaac J. Manjarres
2019-08-13 12:11:28 -07:00
parent 731c5e4ac5
commit cd8ac3aa11
1 changed files with 0 additions and 30 deletions
Download Patch File Download Diff File Expand all files Collapse all files

30
include/linux/iommu.h
View File

@@ -99,8 +99,6 @@ struct iommu_pgtbl_info {
#define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \ #define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \
__IOMMU_DOMAIN_DMA_API) __IOMMU_DOMAIN_DMA_API)
#define to_msm_iommu_ops(_iommu_ops) \
container_of(_iommu_ops, struct msm_iommu_ops, iommu_ops)
#define IOMMU_DOMAIN_NAME_LEN 32 #define IOMMU_DOMAIN_NAME_LEN 32
struct iommu_domain { struct iommu_domain {
@@ -298,34 +296,6 @@ struct iommu_ops {
unsigned long pgsize_bitmap; unsigned long pgsize_bitmap;
}; };
/**
* struct msm_iommu_ops - standard iommu ops, as well as additional MSM
* specific iommu ops
* @map_sg: map a scatter-gather list of physically contiguous memory chunks
* to an iommu domain
* @iova_to_phys_hard: translate iova to physical address using IOMMU hardware
* @is_iova_coherent: checks coherency of the given iova
* @trigger_fault: trigger a fault on the device attached to an iommu domain
* @tlbi_domain: Invalidate all TLBs covering an iommu domain
* @enable_config_clocks: Enable all config clocks for this domain's IOMMU
* @disable_config_clocks: Disable all config clocks for this domain's IOMMU
* @iova_to_pte: translate iova to Page Table Entry (PTE).
* @iommu_ops: the standard iommu ops
*/
struct msm_iommu_ops {
size_t (*map_sg)(struct iommu_domain *domain, unsigned long iova,
struct scatterlist *sg, unsigned int nents, int prot);
phys_addr_t (*iova_to_phys_hard)(struct iommu_domain *domain,
dma_addr_t iova);
bool (*is_iova_coherent)(struct iommu_domain *domain, dma_addr_t iova);
void (*trigger_fault)(struct iommu_domain *domain, unsigned long flags);
void (*tlbi_domain)(struct iommu_domain *domain);
int (*enable_config_clocks)(struct iommu_domain *domain);
void (*disable_config_clocks)(struct iommu_domain *domain);
uint64_t (*iova_to_pte)(struct iommu_domain *domain, dma_addr_t iova);
struct iommu_ops iommu_ops;
};
/** /**
* struct iommu_device - IOMMU core representation of one IOMMU hardware * struct iommu_device - IOMMU core representation of one IOMMU hardware
* instance * instance