Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux
Merge mainline to pick up c7513c2a27 ("crypto/arm64: aes-ce-gcm -
add missing kernel_neon_begin/end pair").
This commit is contained in:
@@ -6,11 +6,15 @@
|
||||
* Copyright (C) 2004 Sun Microsystems Inc.
|
||||
* Copyright (C) 2005-2016 Broadcom Corporation.
|
||||
* Copyright (C) 2016-2017 Broadcom Limited.
|
||||
* Copyright (C) 2018 Broadcom. All Rights Reserved. The term "Broadcom"
|
||||
* refers to Broadcom Inc. and/or its subsidiaries.
|
||||
*
|
||||
* Firmware is:
|
||||
* Derived from proprietary unpublished source code,
|
||||
* Copyright (C) 2000-2016 Broadcom Corporation.
|
||||
* Copyright (C) 2016-2017 Broadcom Ltd.
|
||||
* Copyright (C) 2018 Broadcom. All Rights Reserved. The term "Broadcom"
|
||||
* refers to Broadcom Inc. and/or its subsidiaries.
|
||||
*
|
||||
* Permission is hereby granted for the distribution of this firmware
|
||||
* data in hexadecimal or equivalent format, provided this copyright
|
||||
@@ -9291,6 +9295,15 @@ static int tg3_chip_reset(struct tg3 *tp)
|
||||
|
||||
tg3_restore_clk(tp);
|
||||
|
||||
/* Increase the core clock speed to fix tx timeout issue for 5762
|
||||
* with 100Mbps link speed.
|
||||
*/
|
||||
if (tg3_asic_rev(tp) == ASIC_REV_5762) {
|
||||
val = tr32(TG3_CPMU_CLCK_ORIDE_ENABLE);
|
||||
tw32(TG3_CPMU_CLCK_ORIDE_ENABLE, val |
|
||||
TG3_CPMU_MAC_ORIDE_ENABLE);
|
||||
}
|
||||
|
||||
/* Reprobe ASF enable state. */
|
||||
tg3_flag_clear(tp, ENABLE_ASF);
|
||||
tp->phy_flags &= ~(TG3_PHYFLG_1G_ON_VAUX_OK |
|
||||
|
||||
Reference in New Issue
Block a user