i3c: i3c-master-qcom-geni: Force the xfer mode as DMA mode

This change enables DMA mode for regular private transfers.
And forces FIFO mode for CCC and DAA operations.

We can selectively decide to switch between xfer modes later
which is based on data length of the transfer similar to i2c
way of xfer mode selection.

Change-Id: Iaa183d314ebd27c43e498b438d3791a6b716d1de
Signed-off-by: Mukesh Kumar Savaliya <msavaliy@codeaurora.org>
This commit is contained in:
Mukesh Kumar Savaliya
2020-09-14 23:32:28 +05:30
parent 6d79a96abb
commit a4ac384410

View File

@@ -750,8 +750,8 @@ static int _i3c_geni_execute_command
geni_setup_m_cmd(gi3c->se.base, xfer->m_cmd, xfer->m_param);
GENI_SE_DBG(gi3c->ipcl, false, gi3c->se.dev,
"I3C cmd:0x%x param:0x%x READ len:%d, m_cmd: 0x%x\n",
xfer->m_cmd, xfer->m_param, len,
"Read_mode:%d cmd:0x%x param:0x%x len:%d m_cmd:0x%x\n",
xfer->mode, xfer->m_cmd, xfer->m_param, len,
geni_read_reg(gi3c->se.base, SE_GENI_M_CMD0));
if (xfer->mode == SE_DMA) {
@@ -760,6 +760,10 @@ static int _i3c_geni_execute_command
len, &rx_dma);
if (ret) {
xfer->mode = FIFO_MODE;
GENI_SE_ERR(gi3c->ipcl, true, gi3c->se.dev,
"DMA Read Err:%d,Enabling FIFO mode\n",
ret);
WARN_ON(1);
geni_se_select_mode(gi3c->se.base, xfer->mode);
}
}
@@ -768,8 +772,8 @@ static int _i3c_geni_execute_command
geni_setup_m_cmd(gi3c->se.base, xfer->m_cmd, xfer->m_param);
GENI_SE_DBG(gi3c->ipcl, false, gi3c->se.dev,
"I3C cmd:0x%x param:0x%x WRITE len:%d, m_cmd: 0x%x\n",
xfer->m_cmd, xfer->m_param, len,
"Write_mode:%d cmd:0x%x param:0x%x len:%d m_cmd:0x%x\n",
xfer->mode, xfer->m_cmd, xfer->m_param, len,
geni_read_reg(gi3c->se.base, SE_GENI_M_CMD0));
if (xfer->mode == SE_DMA) {
@@ -778,6 +782,10 @@ static int _i3c_geni_execute_command
len, &tx_dma);
if (ret) {
xfer->mode = FIFO_MODE;
GENI_SE_ERR(gi3c->ipcl, true, gi3c->se.dev,
"DMA Write Err:%d,Enabling FIFO mode\n",
ret);
WARN_ON(1);
geni_se_select_mode(gi3c->se.base, xfer->mode);
}
}
@@ -1080,7 +1088,7 @@ static int geni_i3c_master_priv_xfers
for (i = 0; i < nxfers; i++) {
bool stall = (i < (nxfers - 1));
struct i3c_xfer_params xfer = { FIFO_MODE };
struct i3c_xfer_params xfer = { SE_DMA };
xfer.m_param = (stall ? STOP_STRETCH : 0);
xfer.m_param |= ((dev->info.dyn_addr & I3C_ADDR_MASK)