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x86/boot: Spell out "boot CPU" for BP

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It's not obvious to everybody that BP stands for boot processor. At
least it was not for me. And BP is also a CPU register on x86, so it
is ambiguous. Spell out "boot CPU" everywhere instead.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Cc: Alok Kataria <akataria@vmware.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Jean Delvare
2017-10-03 11:47:27 +02:00
committed by Ingo Molnar
parent 9e66317d3c
commit a1652bb8a0
5 changed files with 6 additions and 6 deletions
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2
arch/x86/include/asm/mpspec_def.h
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@@ -58,7 +58,7 @@ struct mpc_table {
#define MP_TRANSLATION 192 #define MP_TRANSLATION 192
#define CPU_ENABLED 1 /* Processor is available */ #define CPU_ENABLED 1 /* Processor is available */
#define CPU_BOOTPROCESSOR 2 /* Processor is the BP */ #define CPU_BOOTPROCESSOR 2 /* Processor is the boot CPU */
#define CPU_STEPPING_MASK 0x000F #define CPU_STEPPING_MASK 0x000F
#define CPU_MODEL_MASK 0x00F0 #define CPU_MODEL_MASK 0x00F0

2
arch/x86/kernel/apic/apic.c
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@@ -1462,7 +1462,7 @@ void setup_local_APIC(void)
/* /*
* Set up LVT0, LVT1: * Set up LVT0, LVT1:
* *
* set up through-local-APIC on the BP's LINT0. This is not * set up through-local-APIC on the boot CPU's LINT0. This is not
* strictly necessary in pure symmetric-IO mode, but sometimes * strictly necessary in pure symmetric-IO mode, but sometimes
* we delegate interrupts to the 8259A. * we delegate interrupts to the 8259A.
*/ */

4
arch/x86/kernel/cpu/common.c
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@@ -863,8 +863,8 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c)
* cache alignment. * cache alignment.
* The others are not touched to avoid unwanted side effects. * The others are not touched to avoid unwanted side effects.
* *
* WARNING: this function is only called on the BP. Don't add code here * WARNING: this function is only called on the boot CPU. Don't add code
* that is supposed to run on all CPUs. * here that is supposed to run on all CPUs.
*/ */
static void __init early_identify_cpu(struct cpuinfo_x86 *c) static void __init early_identify_cpu(struct cpuinfo_x86 *c)
{ {

2
arch/x86/kernel/setup.c
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@@ -1045,7 +1045,7 @@ void __init setup_arch(char **cmdline_p)
/* /*
* VMware detection requires dmi to be available, so this * VMware detection requires dmi to be available, so this
* needs to be done after dmi_scan_machine, for the BP. * needs to be done after dmi_scan_machine(), for the boot CPU.
*/ */
init_hypervisor_platform(); init_hypervisor_platform();

2
arch/x86/kernel/smpboot.c
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@@ -249,7 +249,7 @@ static void notrace start_secondary(void *unused)
/* otherwise gcc will move up smp_processor_id before the cpu_init */ /* otherwise gcc will move up smp_processor_id before the cpu_init */
barrier(); barrier();
/* /*
* Check TSC synchronization with the BP: * Check TSC synchronization with the boot CPU:
*/ */
check_tsc_sync_target(); check_tsc_sync_target();