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techpack: camera: Update from psyche-r-oss

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Change-Id: Iefdee18cac3e1f943ba68f3575ac4249efcc07a5
This commit is contained in:
chaptsand
2022-05-09 21:58:08 +02:00
committed by Sebastiano Barezzi
parent ff0336e582
commit 9eb2570ef9
26 changed files with 180 additions and 202 deletions
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10
techpack/camera/drivers/cam_cdm/cam_cdm_hw_core.c
View File

@@ -665,6 +665,11 @@ irqreturn_t cam_hw_cdm_irq(int irq_num, void *data)
kfree(payload);
return IRQ_HANDLED;
}
if (cam_cdm_write_hw_reg(cdm_hw, CDM_IRQ_CLEAR,
payload->irq_status))
CAM_ERR(CAM_CDM, "Failed to Write CDM HW IRQ Clear");
if (cam_cdm_write_hw_reg(cdm_hw, CDM_IRQ_CLEAR_CMD, 0x01))
CAM_ERR(CAM_CDM, "Failed to Write CDM HW IRQ cmd");
if (payload->irq_status &
CAM_CDM_IRQ_STATUS_INFO_INLINE_IRQ_MASK) {
if (cam_cdm_read_hw_reg(cdm_hw, CDM_IRQ_USR_DATA,
@@ -677,11 +682,6 @@ irqreturn_t cam_hw_cdm_irq(int irq_num, void *data)
payload->hw = cdm_hw;
INIT_WORK((struct work_struct *)&payload->work,
cam_hw_cdm_work);
if (cam_cdm_write_hw_reg(cdm_hw, CDM_IRQ_CLEAR,
payload->irq_status))
CAM_ERR(CAM_CDM, "Failed to Write CDM HW IRQ Clear");
if (cam_cdm_write_hw_reg(cdm_hw, CDM_IRQ_CLEAR_CMD, 0x01))
CAM_ERR(CAM_CDM, "Failed to Write CDM HW IRQ cmd");
work_status = queue_work(cdm_core->work_queue, &payload->work);
if (work_status == false) {
CAM_ERR(CAM_CDM, "Failed to queue work for irq=0x%x",

2
techpack/camera/drivers/cam_fd/cam_fd_context.c
View File

@@ -124,7 +124,7 @@ static int __cam_fd_ctx_flush_dev_in_activated(struct cam_context *ctx,
rc = cam_context_flush_dev_to_hw(ctx, cmd);
if (rc)
CAM_ERR(CAM_ICP, "Failed to flush device, rc=%d", rc);
CAM_ERR(CAM_FD, "Failed to flush device, rc=%d", rc);
return rc;
}

38
techpack/camera/drivers/cam_fd/fd_hw_mgr/cam_fd_hw_mgr.c
View File

@@ -854,7 +854,6 @@ static int cam_fd_mgr_util_submit_frame(void *priv, void *data)
trace_cam_submit_to_hw("FD", frame_req->request_id);
list_del_init(&frame_req->list);
mutex_unlock(&hw_mgr->frame_req_mutex);
if (hw_device->hw_intf->hw_ops.start) {
start_args.hw_ctx = hw_ctx;
@@ -870,11 +869,13 @@ static int cam_fd_mgr_util_submit_frame(void *priv, void *data)
if (rc) {
CAM_ERR(CAM_FD, "Failed in HW Start %d", rc);
mutex_unlock(&hw_device->lock);
mutex_unlock(&hw_mgr->frame_req_mutex);
goto put_req_into_free_list;
}
} else {
CAM_ERR(CAM_FD, "Invalid hw_ops.start");
mutex_unlock(&hw_device->lock);
mutex_unlock(&hw_mgr->frame_req_mutex);
rc = -EPERM;
goto put_req_into_free_list;
}
@@ -882,30 +883,13 @@ static int cam_fd_mgr_util_submit_frame(void *priv, void *data)
hw_device->ready_to_process = false;
hw_device->cur_hw_ctx = hw_ctx;
hw_device->req_id = frame_req->request_id;
mutex_unlock(&hw_device->lock);
list_add_tail(&frame_req->list, &hw_mgr->frame_processing_list);
rc = cam_fd_mgr_util_put_frame_req(
&hw_mgr->frame_processing_list, &frame_req);
if (rc) {
CAM_ERR(CAM_FD,
"Failed in putting frame req in processing list");
goto stop_unlock;
}
mutex_unlock(&hw_device->lock);
mutex_unlock(&hw_mgr->frame_req_mutex);
return rc;
stop_unlock:
if (hw_device->hw_intf->hw_ops.stop) {
struct cam_fd_hw_stop_args stop_args;
stop_args.hw_ctx = hw_ctx;
stop_args.ctx_hw_private = hw_ctx->ctx_hw_private;
stop_args.hw_req_private = &frame_req->hw_req_private;
if (hw_device->hw_intf->hw_ops.stop(
hw_device->hw_intf->hw_priv, &stop_args,
sizeof(stop_args)))
CAM_ERR(CAM_FD, "Failed in HW Stop %d", rc);
}
put_req_into_free_list:
cam_fd_mgr_util_put_frame_req(&hw_mgr->frame_free_list, &frame_req);
@@ -1244,6 +1228,8 @@ static int cam_fd_mgr_hw_start(void *hw_mgr_priv, void *mgr_start_args)
struct cam_fd_device *hw_device;
struct cam_fd_hw_init_args hw_init_args;
struct cam_hw_info *fd_hw;
struct cam_fd_core *fd_core;
if (!hw_mgr_priv || !hw_mgr_start_args) {
CAM_ERR(CAM_FD, "Invalid arguments %pK %pK",
hw_mgr_priv, hw_mgr_start_args);
@@ -1265,9 +1251,17 @@ static int cam_fd_mgr_hw_start(void *hw_mgr_priv, void *mgr_start_args)
return rc;
}
hw_device->ready_to_process = true;
fd_hw = (struct cam_hw_info *)hw_device->hw_intf->hw_priv;
fd_core = (struct cam_fd_core *)fd_hw->core_info;
if (hw_device->hw_intf->hw_ops.init) {
hw_init_args.hw_ctx = hw_ctx;
hw_init_args.ctx_hw_private = hw_ctx->ctx_hw_private;
if (fd_core->hw_static_info->enable_errata_wa.skip_reset)
hw_init_args.reset_required = false;
else
hw_init_args.reset_required = true;
rc = hw_device->hw_intf->hw_ops.init(
hw_device->hw_intf->hw_priv, &hw_init_args,
sizeof(hw_init_args));
@@ -1537,6 +1531,8 @@ static int cam_fd_mgr_hw_stop(void *hw_mgr_priv, void *mgr_stop_args)
CAM_DBG(CAM_FD, "FD Device ready_to_process = %d",
hw_device->ready_to_process);
hw_device->ready_to_process = true;
if (hw_device->hw_intf->hw_ops.deinit) {
hw_deinit_args.hw_ctx = hw_ctx;
hw_deinit_args.ctx_hw_private = hw_ctx->ctx_hw_private;

10
techpack/camera/drivers/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_core.c
View File

@@ -673,10 +673,12 @@ int cam_fd_hw_init(void *hw_priv, void *init_hw_args, uint32_t arg_size)
fd_core->core_state = CAM_FD_CORE_STATE_IDLE;
spin_unlock_irqrestore(&fd_core->spin_lock, flags);
rc = cam_fd_hw_reset(hw_priv, NULL, 0);
if (rc) {
CAM_ERR(CAM_FD, "Reset Failed, rc=%d", rc);
goto disable_soc;
if (init_args->reset_required){
rc = cam_fd_hw_reset(hw_priv, NULL, 0);
if (rc) {
CAM_ERR(CAM_FD, "Reset Failed, rc=%d", rc);
goto disable_soc;
}
}
cam_fd_hw_util_enable_power_on_settings(fd_hw);

1
techpack/camera/drivers/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_core.h
View File

@@ -140,6 +140,7 @@ struct cam_fd_hw_errata_wa {
bool single_irq_only;
bool ro_mode_enable_always;
bool ro_mode_results_invalid;
bool skip_reset;
};
/**

1
techpack/camera/drivers/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_dev.c
View File

@@ -110,6 +110,7 @@ static int cam_fd_hw_dev_probe(struct platform_device *pdev)
memset(&init_args, 0x0, sizeof(init_args));
memset(&deinit_args, 0x0, sizeof(deinit_args));
init_args.reset_required = true;
rc = cam_fd_hw_init(fd_hw, &init_args, sizeof(init_args));
if (rc) {
CAM_ERR(CAM_FD, "Failed to hw init, rc=%d", rc);

2
techpack/camera/drivers/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_intf.h
View File

@@ -158,10 +158,12 @@ struct cam_fd_hw_release_args {
*
* @hw_ctx : HW context for which init is requested
* @ctx_hw_private : HW layer's private information specific to this hw context
* @reset_required : Indicates if the reset is required during init or not
*/
struct cam_fd_hw_init_args {
void *hw_ctx;
void *ctx_hw_private;
bool reset_required;
};
/**

39
techpack/camera/drivers/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_soc.c
View File

@@ -71,6 +71,39 @@ static int cam_fd_hw_soc_util_setup_regbase_indices(
return 0;
}
static int cam_fd_soc_set_clk_flags(struct cam_hw_soc_info *soc_info)
{
int i, rc = 0;
if (soc_info->num_clk > CAM_SOC_MAX_CLK) {
CAM_ERR(CAM_FD, "Invalid num clk %d", soc_info->num_clk);
return -EINVAL;
}
/* set memcore and mem periphery logic flags to 0 */
for (i = 0; i < soc_info->num_clk; i++) {
if ((strcmp(soc_info->clk_name[i], "fd_core_clk") == 0) ||
(strcmp(soc_info->clk_name[i], "fd_core_uar_clk") ==
0)) {
rc = cam_soc_util_set_clk_flags(soc_info, i,
CLKFLAG_NORETAIN_MEM);
if (rc)
CAM_ERR(CAM_FD,
"Failed in NORETAIN_MEM i=%d, rc=%d",
i, rc);
cam_soc_util_set_clk_flags(soc_info, i,
CLKFLAG_NORETAIN_PERIPH);
if (rc)
CAM_ERR(CAM_FD,
"Failed in NORETAIN_PERIPH i=%d, rc=%d",
i, rc);
}
}
return rc;
}
void cam_fd_soc_register_write(struct cam_hw_soc_info *soc_info,
enum cam_fd_reg_base reg_base, uint32_t reg_offset, uint32_t reg_value)
{
@@ -195,6 +228,12 @@ int cam_fd_soc_init_resources(struct cam_hw_soc_info *soc_info,
return rc;
}
rc = cam_fd_soc_set_clk_flags(soc_info);
if (rc) {
CAM_ERR(CAM_FD, "failed in set_clk_flags rc=%d", rc);
goto release_res;
}
soc_private = kzalloc(sizeof(struct cam_fd_soc_private), GFP_KERNEL);
if (!soc_private) {
rc = -ENOMEM;

1
techpack/camera/drivers/cam_fd/fd_hw_mgr/fd_hw/cam_fd_hw_v501.h
View File

@@ -50,6 +50,7 @@ static struct cam_fd_hw_static_info cam_fd_wrapper200_core501_info = {
.single_irq_only = true,
.ro_mode_enable_always = true,
.ro_mode_results_invalid = true,
.skip_reset = true,
},
.irq_mask = CAM_FD_IRQ_TO_MASK(CAM_FD_IRQ_FRAME_DONE) |
CAM_FD_IRQ_TO_MASK(CAM_FD_IRQ_HALT_DONE) |

54
techpack/camera/drivers/cam_isp/cam_isp_context.c
View File

@@ -2707,58 +2707,6 @@ static int __cam_isp_ctx_rdi_only_reg_upd_in_bubble_applied_state(
return 0;
}
static int __cam_isp_ctx_rdi_only_reg_upd_in_applied_state(
struct cam_isp_context *ctx_isp, void *evt_data)
{
struct cam_ctx_request *req = NULL;
struct cam_context *ctx = ctx_isp->base;
struct cam_isp_ctx_req *req_isp;
uint64_t request_id = 0;
if (list_empty(&ctx->wait_req_list)) {
CAM_ERR(CAM_ISP, "Reg upd ack with no waiting request");
goto end;
}
ctx_isp->substate_activated = CAM_ISP_CTX_ACTIVATED_EPOCH;
req = list_first_entry(&ctx->wait_req_list,
struct cam_ctx_request, list);
list_del_init(&req->list);
req_isp = (struct cam_isp_ctx_req *) req->req_priv;
request_id = (req_isp->hw_update_data.packet_opcode_type ==
CAM_ISP_PACKET_INIT_DEV) ? 0 : req->request_id;
if (req_isp->num_fence_map_out != 0) {
list_add_tail(&req->list, &ctx->active_req_list);
ctx_isp->active_req_cnt++;
request_id = req->request_id;
CAM_DBG(CAM_REQ,
"move request %lld to active list(cnt = %d), ctx %u",
req->request_id, ctx_isp->active_req_cnt, ctx->ctx_id);
} else {
/* no io config, so the request is completed. */
list_add_tail(&req->list, &ctx->free_req_list);
CAM_DBG(CAM_ISP,
"move active request %lld to free list(cnt = %d), ctx %u",
req->request_id, ctx_isp->active_req_cnt, ctx->ctx_id);
}
CAM_DBG(CAM_ISP, "next Substate[%s]",
__cam_isp_ctx_substate_val_to_type(
ctx_isp->substate_activated));
return 0;
end:
/*
* There is no request in the pending list, move the sub state machine
* to SOF sub state
*/
ctx_isp->substate_activated = CAM_ISP_CTX_ACTIVATED_SOF;
return 0;
}
static struct cam_isp_ctx_irq_ops
cam_isp_ctx_rdi_only_activated_state_machine_irq
[CAM_ISP_CTX_ACTIVATED_MAX] = {
@@ -2778,7 +2726,7 @@ static struct cam_isp_ctx_irq_ops
.irq_ops = {
__cam_isp_ctx_handle_error,
__cam_isp_ctx_rdi_only_sof_in_applied_state,
__cam_isp_ctx_rdi_only_reg_upd_in_applied_state,
NULL,
NULL,
NULL,
__cam_isp_ctx_buf_done_in_applied,

45
techpack/camera/drivers/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c
View File

@@ -3720,7 +3720,18 @@ static int cam_ife_mgr_stop_hw(void *hw_mgr_priv, void *stop_hw_args)
cam_ife_mgr_pause_hw(ctx);
wait_for_completion(&ctx->config_done_complete);
rc = wait_for_completion_timeout(&ctx->config_done_complete,msecs_to_jiffies(300));
if (rc <= 0) {
CAM_WARN(CAM_ISP,
"config done completion timeout for last applied req_id=%llu rc=%d ctx_index %d",
ctx->applied_req_id, rc, ctx->ctx_index);
rc = -ETIMEDOUT;
} else {
CAM_DBG(CAM_ISP,
"config done Success for req_id=%llu ctx_index %d",
ctx->applied_req_id, ctx->ctx_index);
rc = 0;
}
if (stop_isp->stop_only)
goto end;
@@ -3865,8 +3876,6 @@ static int cam_ife_mgr_start_hw(void *hw_mgr_priv, void *start_hw_args)
bool res_rdi_context_set = false;
uint32_t primary_rdi_src_res;
uint32_t primary_rdi_out_res;
uint32_t last_rdi_src_res, last_rdi_res;
uint32_t last_rdi_out_res;
primary_rdi_src_res = CAM_ISP_HW_VFE_IN_MAX;
primary_rdi_out_res = CAM_ISP_IFE_OUT_RES_MAX;
@@ -3966,29 +3975,6 @@ static int cam_ife_mgr_start_hw(void *hw_mgr_priv, void *start_hw_args)
CAM_DBG(CAM_ISP, "START IFE OUT ... in ctx id:%d",
ctx->ctx_index);
/* Find out last rdi out resource */
for (i = 0; i < CAM_IFE_HW_OUT_RES_MAX; i++) {
hw_mgr_res = &ctx->res_list_ife_out[i];
switch (hw_mgr_res->res_id) {
case CAM_ISP_IFE_OUT_RES_RDI_0:
case CAM_ISP_IFE_OUT_RES_RDI_1:
case CAM_ISP_IFE_OUT_RES_RDI_2:
case CAM_ISP_IFE_OUT_RES_RDI_3:
if (ctx->is_rdi_only_context) {
last_rdi_res = i;
last_rdi_out_res = hw_mgr_res->res_id;
}
default:
break;
}
}
if (ctx->is_rdi_only_context) {
hw_mgr_res = &ctx->res_list_ife_out[last_rdi_res];
hw_mgr_res->hw_res[0]->rdi_only_last_res =
ctx->is_rdi_only_context;
}
/* start the IFE out devices */
for (i = 0; i < CAM_IFE_HW_OUT_RES_MAX; i++) {
hw_mgr_res = &ctx->res_list_ife_out[i];
@@ -4031,9 +4017,6 @@ static int cam_ife_mgr_start_hw(void *hw_mgr_priv, void *start_hw_args)
if (primary_rdi_out_res < CAM_ISP_IFE_OUT_RES_MAX)
primary_rdi_src_res =
cam_convert_rdi_out_res_id_to_src(primary_rdi_out_res);
if (last_rdi_out_res < CAM_ISP_IFE_OUT_RES_MAX)
last_rdi_src_res =
cam_convert_rdi_out_res_id_to_src(last_rdi_out_res);
CAM_DBG(CAM_ISP, "START IFE SRC ... in ctx id:%d",
ctx->ctx_index);
@@ -4043,10 +4026,6 @@ static int cam_ife_mgr_start_hw(void *hw_mgr_priv, void *start_hw_args)
hw_mgr_res->hw_res[0]->rdi_only_ctx =
ctx->is_rdi_only_context;
}
if (last_rdi_src_res == hw_mgr_res->res_id) {
hw_mgr_res->hw_res[0]->rdi_only_last_res =
ctx->is_rdi_only_context;
}
rc = cam_ife_hw_mgr_start_hw_res(hw_mgr_res, ctx);
if (rc) {

46
techpack/camera/drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.c
View File

@@ -502,11 +502,11 @@ static int cam_ife_csid_global_reset(struct cam_ife_csid_hw *csid_hw)
cam_io_w_mb(0x2, soc_info->reg_map[0].mem_base +
csid_reg->rdi_reg[i]->csid_rdi_cfg0_addr);
/* reset HW regs first, then SW */
rc = cam_ife_csid_reset_regs(csid_hw, true);
/* reset SW regs first, then HW */
rc = cam_ife_csid_reset_regs(csid_hw, false);
if (rc < 0)
goto end;
rc = cam_ife_csid_reset_regs(csid_hw, false);
rc = cam_ife_csid_reset_regs(csid_hw, true);
if (rc < 0)
goto end;
@@ -792,10 +792,6 @@ int cam_ife_csid_cid_reserve(struct cam_ife_csid_hw *csid_hw,
/* current configure res type should match requested res type */
if (csid_hw->res_type != cid_reserv->in_port->res_type) {
rc = -EINVAL;
CAM_ERR(CAM_ISP, "[wrong res_type], CSID:%d, csid_hw->res_type:%d, cid_reserv->res_type:%d",
csid_hw->hw_intf->hw_idx,
csid_hw->res_type,
cid_reserv->in_port->res_type);
goto end;
}
@@ -807,12 +803,6 @@ int cam_ife_csid_cid_reserve(struct cam_ife_csid_hw *csid_hw,
csid_hw->csi2_rx_cfg.lane_num !=
cid_reserv->in_port->lane_num) {
rc = -EINVAL;
CAM_ERR(CAM_ISP,
"[wrong lane configuration]: CSID:%d res_sel:0x%x Lane type:%d lane_num:%d",
csid_hw->hw_intf->hw_idx,
csid_hw->csi2_rx_cfg.lane_cfg,
csid_hw->csi2_rx_cfg.lane_type,
csid_hw->csi2_rx_cfg.lane_num);
goto end;
}
} else {
@@ -825,17 +815,6 @@ int cam_ife_csid_cid_reserve(struct cam_ife_csid_hw *csid_hw,
csid_hw->tpg_cfg.test_pattern !=
cid_reserv->in_port->test_pattern) {
rc = -EINVAL;
CAM_ERR(CAM_ISP,
"[wrong tpg cfg]: CSID:%d hw_intf -> [in_format:%d width:%d height:%d test_pattern:%d] cid_reserv -> [in_format:%d width:%d height:%d test_pattern:%d]",
csid_hw->hw_intf->hw_idx,
csid_hw->tpg_cfg.in_format,
csid_hw->tpg_cfg.width,
csid_hw->tpg_cfg.height,
csid_hw->tpg_cfg.test_pattern,
cid_reserv->in_port->format,
cid_reserv->in_port->left_width,
cid_reserv->in_port->height,
cid_reserv->in_port->test_pattern);
goto end;
}
}
@@ -1524,8 +1503,8 @@ static int cam_ife_csid_enable_csi2(
csid_reg = csid_hw->csid_info->csid_reg;
soc_info = &csid_hw->hw_info->soc_info;
CAM_DBG(CAM_ISP, "CSID:%d count:%d config csi2 rx res_id:%d",
csid_hw->hw_intf->hw_idx, csid_hw->csi2_cfg_cnt, res->res_id);
CAM_DBG(CAM_ISP, "CSID:%d count:%d config csi2 rx",
csid_hw->hw_intf->hw_idx, csid_hw->csi2_cfg_cnt);
/* overflow check before increment */
if (csid_hw->csi2_cfg_cnt == UINT_MAX) {
@@ -1535,7 +1514,7 @@ static int cam_ife_csid_enable_csi2(
}
cid_data = (struct cam_ife_csid_cid_data *)res->res_priv;
cid_data->init_cnt++;
res->res_state = CAM_ISP_RESOURCE_STATE_STREAMING;
csid_hw->csi2_cfg_cnt++;
if (csid_hw->csi2_cfg_cnt > 1)
@@ -1621,7 +1600,6 @@ static int cam_ife_csid_disable_csi2(
{
const struct cam_ife_csid_reg_offset *csid_reg;
struct cam_hw_soc_info *soc_info;
struct cam_ife_csid_cid_data *cid_data;
if (res->res_id >= CAM_IFE_CSID_CID_MAX) {
CAM_ERR(CAM_ISP, "CSID:%d Invalid res id :%d",
@@ -1631,19 +1609,11 @@ static int cam_ife_csid_disable_csi2(
csid_reg = csid_hw->csid_info->csid_reg;
soc_info = &csid_hw->hw_info->soc_info;
cid_data = (struct cam_ife_csid_cid_data *)res->res_priv;
CAM_DBG(CAM_ISP, "CSID:%d cnt : %d Disable csi2 rx res->res_id:%d",
csid_hw->hw_intf->hw_idx, csid_hw->csi2_cfg_cnt, res->res_id);
if (cid_data->init_cnt)
cid_data->init_cnt--;
if (!cid_data->init_cnt)
res->res_state = CAM_ISP_RESOURCE_STATE_RESERVED;
CAM_DBG(CAM_ISP, "CSID:%d cnt : %d Disable csi2 rx",
csid_hw->hw_intf->hw_idx, csid_hw->csi2_cfg_cnt);
if (csid_hw->csi2_cfg_cnt)
csid_hw->csi2_cfg_cnt--;
CAM_DBG(CAM_ISP, "res_id %d res_state=%d",
res->res_id, res->res_state);
if (csid_hw->csi2_cfg_cnt)
return 0;

6
techpack/camera/drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_core.h
View File

@@ -81,7 +81,7 @@ enum cam_csid_path_halt_mode {
};
/**
*enum cam_csid_path_timestamp_stb_sel - select the sof/eofmiui.com strobes used to
*enum cam_csid_path_timestamp_stb_sel - select the sof/eof strobes used to
* capture the timestamp
*/
enum cam_csid_path_timestamp_stb_sel {
@@ -452,7 +452,6 @@ struct cam_ife_csid_tpg_cfg {
* @cnt: Cid resource reference count.
* @tpg_set: Tpg used for this cid resource
* @is_valid_vc1_dt1: Valid vc1 and dt1
* @init_cnt cid resource init count
*
*/
struct cam_ife_csid_cid_data {
@@ -463,7 +462,6 @@ struct cam_ife_csid_cid_data {
uint32_t cnt;
uint32_t tpg_set;
uint32_t is_valid_vc1_dt1;
uint32_t init_cnt;
};
@@ -547,7 +545,7 @@ struct cam_ife_csid_path_cfg {
* @clk_rate Clock rate
* @sof_irq_triggered: Flag is set on receiving event to enable sof irq
* incase of SOF freeze.
* @is_resetting: informs whether reset is started or not.
* @is_resetting: informs whether reset is started or not.
* @irq_debug_cnt: Counter to track sof irq's when above flag is set.
* @error_irq_count Error IRQ count, if continuous error irq comes
* need to stop the CSID and mask interrupts.

2
techpack/camera/drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_isp_hw.h
View File

@@ -123,7 +123,6 @@ enum cam_isp_hw_cmd_type {
* schedule IRQ events related to this resource
* @irq_handle: handle returned on subscribing for IRQ event
* @rdi_only_ctx: resource belong to rdi only context or not
* @rdi_only_last_res: Last resource belong to rdi only context
* @init: function pointer to init the HW resource
* @deinit: function pointer to deinit the HW resource
* @start: function pointer to start the HW resource
@@ -144,7 +143,6 @@ struct cam_isp_resource_node {
void *tasklet_info;
int irq_handle;
int rdi_only_ctx;
int rdi_only_last_res;
int (*init)(struct cam_isp_resource_node *rsrc_node,
void *init_args, uint32_t arg_size);

6
techpack/camera/drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_bus/cam_vfe_bus_ver3.c
View File

@@ -2146,12 +2146,8 @@ static int cam_vfe_bus_ver3_start_vfe_out(
return -EFAULT;
}
CAM_INFO(CAM_ISP,
"VFE:%d out_type:0x%X RDI context %d for RUP ",
rsrc_data->common_data->core_index, rsrc_data->out_type, vfe_out->rdi_only_last_res);
if ((common_data->is_lite || source_group > CAM_VFE_BUS_VER3_SRC_GRP_0)
&& !vfe_out->rdi_only_last_res)
&& !vfe_out->rdi_only_ctx)
goto end;
if (!common_data->rup_irq_handle[source_group]) {

52
techpack/camera/drivers/cam_req_mgr/cam_req_mgr_core.c
View File

@@ -533,32 +533,34 @@ static void __cam_req_mgr_validate_crm_wd_timer(
CAM_DBG(CAM_CRM,
"rd_idx: %d idx: %d current_frame_timeout: %d ms",
in_q->rd_idx, idx, current_frame_timeout);
if (link->watchdog == NULL)
if (link->watchdog == NULL) {
CAM_ERR(CAM_CRM, "watchdog == null,link:%p", link);
if ((next_frame_timeout + CAM_REQ_MGR_WATCHDOG_TIMEOUT) >
link->watchdog->expires) {
CAM_DBG(CAM_CRM,
"Modifying wd timer expiry from %d ms to %d ms",
link->watchdog->expires,
(next_frame_timeout + CAM_REQ_MGR_WATCHDOG_TIMEOUT));
crm_timer_modify(link->watchdog,
next_frame_timeout +
CAM_REQ_MGR_WATCHDOG_TIMEOUT);
} else if (current_frame_timeout) {
CAM_DBG(CAM_CRM,
"Reset wd timer to current frame from %d ms to %d ms",
link->watchdog->expires,
(current_frame_timeout + CAM_REQ_MGR_WATCHDOG_TIMEOUT));
crm_timer_modify(link->watchdog,
current_frame_timeout +
CAM_REQ_MGR_WATCHDOG_TIMEOUT);
} else if (link->watchdog->expires >
CAM_REQ_MGR_WATCHDOG_TIMEOUT) {
CAM_DBG(CAM_CRM,
"Reset wd timer to default from %d ms to %d ms",
link->watchdog->expires, CAM_REQ_MGR_WATCHDOG_TIMEOUT);
crm_timer_modify(link->watchdog,
CAM_REQ_MGR_WATCHDOG_TIMEOUT);
} else {
if ((next_frame_timeout + CAM_REQ_MGR_WATCHDOG_TIMEOUT) >
link->watchdog->expires) {
CAM_DBG(CAM_CRM,
"Modifying wd timer expiry from %d ms to %d ms",
link->watchdog->expires,
(next_frame_timeout + CAM_REQ_MGR_WATCHDOG_TIMEOUT));
crm_timer_modify(link->watchdog,
next_frame_timeout +
CAM_REQ_MGR_WATCHDOG_TIMEOUT);
} else if (current_frame_timeout) {
CAM_DBG(CAM_CRM,
"Reset wd timer to current frame from %d ms to %d ms",
link->watchdog->expires,
(current_frame_timeout + CAM_REQ_MGR_WATCHDOG_TIMEOUT));
crm_timer_modify(link->watchdog,
current_frame_timeout +
CAM_REQ_MGR_WATCHDOG_TIMEOUT);
} else if (link->watchdog->expires >
CAM_REQ_MGR_WATCHDOG_TIMEOUT) {
CAM_DBG(CAM_CRM,
"Reset wd timer to default from %d ms to %d ms",
link->watchdog->expires, CAM_REQ_MGR_WATCHDOG_TIMEOUT);
crm_timer_modify(link->watchdog,
CAM_REQ_MGR_WATCHDOG_TIMEOUT);
}
}
}

2
techpack/camera/drivers/cam_req_mgr/cam_req_mgr_dev.c
View File

@@ -21,7 +21,7 @@
#include "cam_common_util.h"
#include <linux/slub_def.h>
#define CAM_REQ_MGR_EVENT_MAX 60
#define CAM_REQ_MGR_EVENT_MAX 120
static struct cam_req_mgr_device g_dev;
struct kmem_cache *g_cam_req_mgr_timer_cachep;

9
techpack/camera/drivers/cam_sensor_module/cam_flash/cam_flash_core.c
View File

@@ -1454,6 +1454,15 @@ int cam_flash_pmic_pkt_parser(struct cam_flash_ctrl *fctrl, void *arg)
"Apply setting failed: %d",
rc);
//xiaomi add start
if(rc && CAM_FLASH_STATE_START == fctrl->flash_state)
{
CAM_ERR(CAM_FLASH, "cannot apply settings rc = %d for state %d",
rc, fctrl->flash_state);
return rc;
}
//xiaomi add end
fctrl->flash_state = CAM_FLASH_STATE_CONFIG;
break;
}

17
techpack/camera/drivers/cam_sensor_module/cam_ois/cam_ois_core.c
View File

@@ -951,10 +951,19 @@ static int cam_ois_get_data(struct cam_ois_ctrl_t *o_ctrl,
t_now = get_cycles();
boottime64 = (uint64_t)((ts64.tv_sec * 1000000000) + ts64.tv_nsec);
rc = camera_io_dev_read_seq(&(o_ctrl->io_master_info),
OIS_DATA_ADDR, o_ctrl->ois_data.data,
CAMERA_SENSOR_I2C_TYPE_BYTE, CAMERA_SENSOR_I2C_TYPE_BYTE,
num_data);
if (o_ctrl->opcode.ois_get_data != 0) {
uint32_t ois_addr = (o_ctrl->opcode.ois_get_data & 0xFFFF0000) >> 16;
uint32_t ois_addr_type = o_ctrl->opcode.ois_get_data & 0xFFFF;
rc = camera_io_dev_read_seq(&(o_ctrl->io_master_info),
ois_addr, o_ctrl->ois_data.data,
ois_addr_type, CAMERA_SENSOR_I2C_TYPE_BYTE,
num_data);
} else {
rc = camera_io_dev_read_seq(&(o_ctrl->io_master_info),
OIS_DATA_ADDR, o_ctrl->ois_data.data,
CAMERA_SENSOR_I2C_TYPE_BYTE, CAMERA_SENSOR_I2C_TYPE_BYTE,
num_data);
}
o_ctrl->ois_data.data_timestamp = (uint64_t)(t_now*10000/192);//< QTimer Freq = 19.2 MHz
if (rc < 0) {

6
techpack/camera/drivers/cam_sensor_module/cam_sensor_io/cam_sensor_cci_i2c.c
View File

@@ -160,7 +160,7 @@ int32_t cam_cci_i2c_write_continuous_table(
}
static int32_t cam_cci_i2c_compare(struct cam_sensor_cci_client *client,
uint32_t addr, uint16_t data, uint16_t data_mask,
uint32_t addr, uint32_t data, uint32_t data_mask,
enum camera_sensor_i2c_type data_type,
enum camera_sensor_i2c_type addr_type)
{
@@ -173,14 +173,14 @@ static int32_t cam_cci_i2c_compare(struct cam_sensor_cci_client *client,
return rc;
CAM_DBG(CAM_SENSOR, "addr %04x, %04x,compare data = %d", addr, reg_data, (int16_t)reg_data);
reg_data = reg_data & 0xFFFF;
reg_data = reg_data & 0xFFFFFFFF;
if (data == (reg_data & ~data_mask))
return I2C_COMPARE_MATCH;
return I2C_COMPARE_MISMATCH;
}
int32_t cam_cci_i2c_poll(struct cam_sensor_cci_client *client,
uint32_t addr, uint16_t data, uint16_t data_mask,
uint32_t addr, uint32_t data, uint32_t data_mask,
enum camera_sensor_i2c_type data_type,
enum camera_sensor_i2c_type addr_type,
uint32_t delay_ms)

2
techpack/camera/drivers/cam_sensor_module/cam_sensor_io/cam_sensor_i2c.h
View File

@@ -92,7 +92,7 @@ int32_t cam_sensor_cci_i2c_util(struct cam_sensor_cci_client *cci_client,
* This API implements CCI based I2C poll
*/
int32_t cam_cci_i2c_poll(struct cam_sensor_cci_client *client,
uint32_t addr, uint16_t data, uint16_t data_mask,
uint32_t addr, uint32_t data, uint32_t data_mask,
enum camera_sensor_i2c_type data_type,
enum camera_sensor_i2c_type addr_type,
uint32_t delay_ms);

2
techpack/camera/drivers/cam_sensor_module/cam_sensor_io/cam_sensor_io.c
View File

@@ -7,7 +7,7 @@
#include "cam_sensor_i2c.h"
int32_t camera_io_dev_poll(struct camera_io_master *io_master_info,
uint32_t addr, uint16_t data, uint32_t data_mask,
uint32_t addr, uint32_t data, uint32_t data_mask,
enum camera_sensor_i2c_type addr_type,
enum camera_sensor_i2c_type data_type,
uint32_t delay_ms)

2
techpack/camera/drivers/cam_sensor_module/cam_sensor_io/cam_sensor_io.h
View File

@@ -106,7 +106,7 @@ int32_t camera_io_dev_erase(struct camera_io_master *io_master_info,
* This API abstracts poll functionality based on master type
*/
int32_t camera_io_dev_poll(struct camera_io_master *io_master_info,
uint32_t addr, uint16_t data, uint32_t data_mask,
uint32_t addr, uint32_t data, uint32_t data_mask,
enum camera_sensor_i2c_type addr_type,
enum camera_sensor_i2c_type data_type,
uint32_t delay_ms);

12
techpack/camera/drivers/cam_utils/cam_soc_util.c
View File

@@ -368,6 +368,18 @@ long cam_soc_util_get_clk_round_rate(struct cam_hw_soc_info *soc_info,
return clk_round_rate(soc_info->clk[clk_index], clk_rate);
}
int cam_soc_util_set_clk_flags(struct cam_hw_soc_info *soc_info,
uint32_t clk_index, unsigned long flags)
{
if (!soc_info || (clk_index >= soc_info->num_clk)) {
CAM_ERR(CAM_UTIL, "Invalid input params %pK, %d",
soc_info, clk_index);
return -EINVAL;
}
return clk_set_flags(soc_info->clk[clk_index], flags);
}
/**
* cam_soc_util_set_clk_rate()
*

14
techpack/camera/drivers/cam_utils/cam_soc_util.h
View File

@@ -371,6 +371,20 @@ int cam_soc_util_disable_platform_resource(struct cam_hw_soc_info *soc_info,
long cam_soc_util_get_clk_round_rate(struct cam_hw_soc_info *soc_info,
uint32_t clk_index, unsigned long clk_rate);
/**
* cam_soc_util_set_clk_flags()
*
* @brief: Camera SOC util to set the flags for a specified clock
*
* @soc_info: Device soc information
* @clk_index: Clock index in soc_info for which flags are to be set
* @flags: Flags to set
*
* @return: Success or Failure
*/
int cam_soc_util_set_clk_flags(struct cam_hw_soc_info *soc_info,
uint32_t clk_index, unsigned long flags);
/**
* cam_soc_util_set_src_clk_rate()
*

1
techpack/camera/include/uapi/media/cam_sensor.h
View File

@@ -118,6 +118,7 @@ struct cam_ois_opcode {
uint32_t coeff;
uint32_t pheripheral;
uint32_t memory;
uint32_t ois_get_data;
uint8_t fw_addr_type;
uint8_t is_addr_increase;
uint8_t is_addr_indata;