clk: add bus voting ops for debug purposes

Add bandwidth voting for clk_summary, clk_show and clk_print_regs
to allow access to the config space of certain multimedia clock
controllers including display, camera, and video.

Change-Id: Ia7b8820cd3fc972caf87530a3105b6c90f37e7c5
Signed-off-by: David Dai <daidavid1@codeaurora.org>
This commit is contained in:
David Dai
2018-09-28 12:54:21 -07:00
committed by Gerrit - the friendly Code Review server
parent f607b1c429
commit 813f666281
2 changed files with 32 additions and 0 deletions

View File

@@ -3236,10 +3236,14 @@ static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
if (!c)
return;
if (c->ops->bus_vote)
c->ops->bus_vote(c->hw, true);
clk_summary_show_one(s, c, level);
hlist_for_each_entry(child, &c->children, child_node)
clk_summary_show_subtree(s, child, level + 1);
if (c->ops->bus_vote)
c->ops->bus_vote(c->hw, false);
}
static int clk_summary_show(struct seq_file *s, void *data)
@@ -3287,6 +3291,9 @@ static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
if (!c)
return;
if (c->ops->bus_vote)
c->ops->bus_vote(c->hw, true);
clk_dump_one(s, c, level);
hlist_for_each_entry(child, &c->children, child_node) {
@@ -3295,6 +3302,9 @@ static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
}
seq_putc(s, '}');
if (c->ops->bus_vote)
c->ops->bus_vote(c->hw, false);
}
static int clk_dump_show(struct seq_file *s, void *data)
@@ -3596,7 +3606,15 @@ void clk_debug_print_hw(struct clk_core *clk, struct seq_file *f)
if (!clk->ops->list_registers)
return;
clk_prepare_lock();
if (clk->ops->bus_vote)
clk->ops->bus_vote(clk->hw, true);
clk->ops->list_registers(f, clk->hw);
if (clk->ops->bus_vote)
clk->ops->bus_vote(clk->hw, false);
clk_prepare_unlock();
}
EXPORT_SYMBOL(clk_debug_print_hw);
@@ -3604,8 +3622,16 @@ static int print_hw_show(struct seq_file *m, void *unused)
{
struct clk_core *c = m->private;
clk_prepare_lock();
if (c->ops->bus_vote)
c->ops->bus_vote(c->hw, true);
clk_debug_print_hw(c, m);
if (c->ops->bus_vote)
c->ops->bus_vote(c->hw, false);
clk_prepare_unlock();
return 0;
}

View File

@@ -219,6 +219,9 @@ struct clk_duty {
* clock that is below rate_max. Return -ENXIO in case there is
* no frequency table.
*
* @bus_vote: Votes for bandwidth on certain config slaves to connect
* ports in order to gain access to clock controllers.
*
* The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow
* implementations to split any work between atomic (enable) and sleepable
* (prepare) contexts. If enabling a clock requires code that might sleep,
@@ -267,6 +270,7 @@ struct clk_ops {
struct clk_hw *hw);
long (*list_rate)(struct clk_hw *hw, unsigned int n,
unsigned long rate_max);
void (*bus_vote)(struct clk_hw *hw, bool enable);
};
/**
@@ -281,6 +285,7 @@ struct clk_ops {
* @vdd_class: voltage scaling requirement class
* @rate_max: maximum clock rate in Hz supported at each voltage level
* @num_rate_max: number of maximum voltage level supported
* @bus_cl_id: client id registered with the bus driver used for bw votes
*/
struct clk_init_data {
const char *name;
@@ -291,6 +296,7 @@ struct clk_init_data {
struct clk_vdd_class *vdd_class;
unsigned long *rate_max;
int num_rate_max;
unsigned int bus_cl_id;
};
struct regulator;