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Merge tag 'LA.UM.9.12.r1-18300-SMxx50.QSSI14.0' of https://git.codelinaro.org/clo/la/kernel/msm-4.19 into android13-4.19-kona

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"LA.UM.9.12.r1-18300-SMxx50.QSSI14.0"

* tag 'LA.UM.9.12.r1-18300-SMxx50.QSSI14.0' of https://git.codelinaro.org/clo/la/kernel/msm-4.19:
  soc: qcom: smem: Add boundary checks for partitions
  clk: qcom: gcc-sdm660: Add SDCC1 BCR clocks for SDM660
  dt-bindings: clock: Add support for SDCC BCR id for SDM660

Change-Id: I056a382b92060591cd4a261c87fc4c0d23f79d03
This commit is contained in:
Michael Bestas
2024-04-19 23:31:54 +03:00
parent a961e47da2 46ac02797c
commit 706e7d5ef1
2 changed files with 4 additions and 0 deletions
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2
drivers/clk/qcom/gcc-sdm660.c
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@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only // SPDX-License-Identifier: GPL-2.0-only
/* /*
* Copyright (c) 2016-2017, 2019-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2016-2017, 2019-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#include <linux/bitops.h> #include <linux/bitops.h>
@@ -2679,6 +2680,7 @@ static struct clk_regmap *gcc_660_clocks[] = {
static const struct qcom_reset_map gcc_660_resets[] = { static const struct qcom_reset_map gcc_660_resets[] = {
[GCC_QUSB2PHY_PRIM_BCR] = { 0x12000 }, [GCC_QUSB2PHY_PRIM_BCR] = { 0x12000 },
[GCC_QUSB2PHY_SEC_BCR] = { 0x12004 }, [GCC_QUSB2PHY_SEC_BCR] = { 0x12004 },
[GCC_SDCC1_BCR] = { 0x16000 },
[GCC_UFS_BCR] = { 0x75000 }, [GCC_UFS_BCR] = { 0x75000 },
[GCC_USB3_DP_PHY_BCR] = { 0x50028 }, [GCC_USB3_DP_PHY_BCR] = { 0x50028 },
[GCC_USB3_PHY_BCR] = { 0x50020 }, [GCC_USB3_PHY_BCR] = { 0x50020 },

2
include/dt-bindings/clock/qcom,gcc-sdm660.h
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@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
/* /*
* Copyright (c) 2016-2017, 2019-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2016-2017, 2019-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#ifndef _DT_BINDINGS_CLK_MSM_GCC_660_H #ifndef _DT_BINDINGS_CLK_MSM_GCC_660_H
@@ -195,5 +196,6 @@
#define GCC_USB_20_BCR 6 #define GCC_USB_20_BCR 6
#define GCC_USB_30_BCR 7 #define GCC_USB_30_BCR 7
#define GCC_USB_PHY_CFG_AHB2PHY_BCR 8 #define GCC_USB_PHY_CFG_AHB2PHY_BCR 8
#define GCC_SDCC1_BCR 9
#endif #endif