TechPanelGM/kernel_xiaomi_sm8250
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

trace doc: convert trace/intel_th.txt to rst format

Browse Source 
This converts the plain text documentation to reStructuredText format and
add it into Sphinx TOC tree. No essential content change.

Cc: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
This commit is contained in:
Changbin Du
2018-02-17 13:39:49 +08:00
committed by Jonathan Corbet
parent 8df2d75e6e
commit 6613581ecd
2 changed files with 23 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/trace/index.rst
View File

@@ -19,3 +19,4 @@ Linux Tracing Technologies
events-msr events-msr
mmiotrace mmiotrace
hwlat_detector hwlat_detector
intel_th

17
Documentation/trace/intel_th.txt → Documentation/trace/intel_th.rst
View File

@@ -1,3 +1,4 @@
=======================
Intel(R) Trace Hub (TH) Intel(R) Trace Hub (TH)
======================= =======================
@@ -65,41 +66,41 @@ allocated, are accessible via /dev/intel_th0/msc{0,1}.
Quick example Quick example
------------- -------------
# figure out which GTH port is the first memory controller: # figure out which GTH port is the first memory controller::
$ cat /sys/bus/intel_th/devices/0-msc0/port $ cat /sys/bus/intel_th/devices/0-msc0/port
0 0
# looks like it's port 0, configure master 33 to send data to port 0: # looks like it's port 0, configure master 33 to send data to port 0::
$ echo 0 > /sys/bus/intel_th/devices/0-gth/masters/33 $ echo 0 > /sys/bus/intel_th/devices/0-gth/masters/33
# allocate a 2-windowed multiblock buffer on the first memory # allocate a 2-windowed multiblock buffer on the first memory
# controller, each with 64 pages: # controller, each with 64 pages::
$ echo multi > /sys/bus/intel_th/devices/0-msc0/mode $ echo multi > /sys/bus/intel_th/devices/0-msc0/mode
$ echo 64,64 > /sys/bus/intel_th/devices/0-msc0/nr_pages $ echo 64,64 > /sys/bus/intel_th/devices/0-msc0/nr_pages
# enable wrapping for this controller, too: # enable wrapping for this controller, too::
$ echo 1 > /sys/bus/intel_th/devices/0-msc0/wrap $ echo 1 > /sys/bus/intel_th/devices/0-msc0/wrap
# and enable tracing into this port: # and enable tracing into this port::
$ echo 1 > /sys/bus/intel_th/devices/0-msc0/active $ echo 1 > /sys/bus/intel_th/devices/0-msc0/active
# .. send data to master 33, see stm.txt for more details .. # .. send data to master 33, see stm.txt for more details ..
# .. wait for traces to pile up .. # .. wait for traces to pile up ..
# .. and stop the trace: # .. and stop the trace::
$ echo 0 > /sys/bus/intel_th/devices/0-msc0/active $ echo 0 > /sys/bus/intel_th/devices/0-msc0/active
# and now you can collect the trace from the device node: # and now you can collect the trace from the device node::
$ cat /dev/intel_th0/msc0 > my_stp_trace $ cat /dev/intel_th0/msc0 > my_stp_trace
Host Debugger Mode Host Debugger Mode
================== ------------------
It is possible to configure the Trace Hub and control its trace It is possible to configure the Trace Hub and control its trace
capture from a remote debug host, which should be connected via one of capture from a remote debug host, which should be connected via one of