Merge tag 'LA.UM.9.12.r1-17400-SMxx50.QSSI13.0' of https://git.codelinaro.org/clo/la/kernel/msm-4.19 into android13-4.19-kona
"LA.UM.9.12.r1-17400-SMxx50.QSSI13.0" * tag 'LA.UM.9.12.r1-17400-SMxx50.QSSI13.0' of https://git.codelinaro.org/clo/la/kernel/msm-4.19: dwc3-msm-core: Remove usage of DWC31_LINK_GDBGLTSSM with POR defconfig: kona: Fix for SonyDualSenseEdge cts failures defconfig: kona: Fix for SonyDualSenseEdge cts failures usb: dwc3-msm-core: Set pipectl susphy in conndone interrupt BACKPORT: bpf: add bpf_ktime_get_boot_ns() bus: mhi: fix potential out-of-bound access usb: dwc3: gadget: Bail out in pullup if soft reset timeout happens msm: kgsl: Limit the syncpoint count for AUX commands msm: kgsl: Prevent wrap around during user address mapping bt: Unset multi channel bit for 44.1/88.2Khz A2DP Rx BACKPORT: bpf: add bpf_ktime_get_boot_ns() iommu: Fix missing return check of arm_lpae_init_pte block: ratelimit handle_bad_sector() message securemsm-kernel: Fix multiple listener registration on same fd Change-Id: I37201afb12aba0a082bdce6acb461839ed3a77b8
This commit is contained in:
@@ -462,8 +462,6 @@ CONFIG_HID_MICROSOFT=y
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CONFIG_HID_MULTITOUCH=y
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CONFIG_HID_NINTENDO=y
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CONFIG_HID_PLANTRONICS=y
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CONFIG_HID_PLAYSTATION=y
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CONFIG_PLAYSTATION_FF=y
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CONFIG_HID_SONY=y
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CONFIG_SONY_FF=y
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CONFIG_HID_QVR=y
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2
arch/arm64/configs/vendor/kona_defconfig
vendored
2
arch/arm64/configs/vendor/kona_defconfig
vendored
@@ -478,8 +478,6 @@ CONFIG_HID_MICROSOFT=y
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CONFIG_HID_MULTITOUCH=y
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CONFIG_HID_NINTENDO=y
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CONFIG_HID_PLANTRONICS=y
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CONFIG_HID_PLAYSTATION=y
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CONFIG_PLAYSTATION_FF=y
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CONFIG_HID_SONY=y
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CONFIG_SONY_FF=y
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CONFIG_HID_QVR=y
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@@ -2133,8 +2133,8 @@ static void handle_bad_sector(struct bio *bio, sector_t maxsector)
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{
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char b[BDEVNAME_SIZE];
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printk(KERN_INFO "attempt to access beyond end of device\n");
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printk(KERN_INFO "%s: rw=%d, want=%Lu, limit=%Lu\n",
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pr_info_ratelimited("attempt to access beyond end of device\n"
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"%s: rw=%d, want=%Lu, limit=%Lu\n",
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bio_devname(bio, b), bio->bi_opf,
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(unsigned long long)bio_end_sector(bio),
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(long long)maxsector);
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@@ -81,14 +81,12 @@ int btfm_slim_slave_enable_port(struct btfmslim *btfmslim, uint8_t port_num,
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uint8_t reg_val = 0, en;
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uint8_t rxport_num = 0;
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uint16_t reg;
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uint8_t prev_reg_val = 0;
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BTFMSLIM_DBG("port(%d) enable(%d)", port_num, enable);
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if (rxport) {
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BTFMSLIM_DBG("sample rate is %d", btfmslim->sample_rate);
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if (enable &&
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btfmslim->sample_rate != 44100 &&
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btfmslim->sample_rate != 88200) {
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BTFMSLIM_DBG("setting multichannel bit");
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if (enable) {
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/* For SCO Rx, A2DP Rx other than 44.1 and 88.2Khz */
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if (port_num < 24) {
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rxport_num = port_num - 16;
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@@ -102,6 +100,21 @@ int btfm_slim_slave_enable_port(struct btfmslim *btfmslim, uint8_t port_num,
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rxport_num);
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}
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if (btfmslim->sample_rate == 44100 ||
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btfmslim->sample_rate == 88200) {
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BTFMSLIM_DBG("unsetting multichannel bit");
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ret = btfm_slim_read(btfmslim, reg, 1,
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&prev_reg_val, IFD);
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if (ret < 0) {
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BTFMSLIM_ERR("error %d reading", ret);
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prev_reg_val = 0;
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}
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BTFMSLIM_DBG("prev_reg_val (%d) from reg(%x)",
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prev_reg_val, reg);
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reg_val = prev_reg_val & ~reg_val;
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} else
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BTFMSLIM_DBG("setting multichannel bit");
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BTFMSLIM_DBG("writing reg_val (%d) to reg(%x)",
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reg_val, reg);
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ret = btfm_slim_write(btfmslim, reg, 1, ®_val, IFD);
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@@ -358,7 +358,7 @@ static struct mhi_sat_device *find_sat_dev_by_id(
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static bool mhi_sat_isvalid_header(struct sat_header *hdr, int len)
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{
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/* validate payload size */
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if (len >= sizeof(*hdr) && (len != hdr->payload_size + sizeof(*hdr)))
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if (len < sizeof(*hdr) || len != hdr->payload_size + sizeof(*hdr))
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return false;
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/* validate SAT IPC version */
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@@ -2129,6 +2129,10 @@ long kgsl_ioctl_gpu_aux_command(struct kgsl_device_private *dev_priv,
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if (!(param->flags & KGSL_GPU_AUX_COMMAND_TIMELINE))
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return -EINVAL;
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if ((param->flags & KGSL_GPU_AUX_COMMAND_SYNC) &&
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(param->numsyncs > KGSL_MAX_SYNCPOINTS))
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return -EINVAL;
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context = kgsl_context_get_owner(dev_priv, param->context_id);
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if (!context)
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return -EINVAL;
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@@ -1,7 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2011-2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <linux/compat.h>
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@@ -2428,14 +2428,18 @@ static uint64_t kgsl_iommu_find_svm_region(struct kgsl_pagetable *pagetable,
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static bool iommu_addr_in_svm_ranges(struct kgsl_iommu_pt *pt,
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u64 gpuaddr, u64 size)
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{
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u64 end = gpuaddr + size;
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/* Make sure size is not zero and we don't wrap around */
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if (end <= gpuaddr)
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return false;
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if ((gpuaddr >= pt->compat_va_start && gpuaddr < pt->compat_va_end) &&
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((gpuaddr + size) > pt->compat_va_start &&
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(gpuaddr + size) <= pt->compat_va_end))
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(end > pt->compat_va_start && end <= pt->compat_va_end))
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return true;
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if ((gpuaddr >= pt->svm_start && gpuaddr < pt->svm_end) &&
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((gpuaddr + size) > pt->svm_start &&
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(gpuaddr + size) <= pt->svm_end))
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(end > pt->svm_start && end <= pt->svm_end))
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return true;
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return false;
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@@ -670,9 +670,11 @@ static int arm_lpae_map_sg(struct io_pgtable_ops *ops, unsigned long iova,
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arm_lpae_iopte *ptep = ms.pgtable +
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ARM_LPAE_LVL_IDX(iova, MAP_STATE_LVL,
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data);
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arm_lpae_init_pte(
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ret = arm_lpae_init_pte(
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data, iova, phys, prot, MAP_STATE_LVL,
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ptep, ms.prev_pgtable, false);
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if (ret)
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goto out_err;
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ms.num_pte++;
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} else {
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ret = __arm_lpae_map(data, iova, phys, pgsize,
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@@ -3,7 +3,7 @@
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* QTI Secure Execution Environment Communicator (QSEECOM) driver
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*
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* Copyright (c) 2012-2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#define pr_fmt(fmt) "QSEECOM: %s: " fmt, __func__
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@@ -375,7 +375,7 @@ struct qseecom_client_handle {
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struct qseecom_listener_handle {
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u32 id;
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bool unregister_pending;
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bool register_pending;
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bool release_called;
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};
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@@ -1525,6 +1525,11 @@ static int qseecom_register_listener(struct qseecom_dev_handle *data,
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struct qseecom_registered_listener_list *new_entry;
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struct qseecom_registered_listener_list *ptr_svc;
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if (data->listener.register_pending) {
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pr_err("Already a listner registration is in process on this FD\n");
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return -EINVAL;
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}
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ret = copy_from_user(&rcvd_lstnr, argp, sizeof(rcvd_lstnr));
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if (ret) {
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pr_err("copy_from_user failed\n");
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@@ -1534,6 +1539,13 @@ static int qseecom_register_listener(struct qseecom_dev_handle *data,
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rcvd_lstnr.sb_size))
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return -EFAULT;
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ptr_svc = __qseecom_find_svc(data->listener.id);
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if (ptr_svc) {
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pr_err("Already a listener registered on this data: lid=%d\n",
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data->listener.id);
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return -EINVAL;
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}
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ptr_svc = __qseecom_find_svc(rcvd_lstnr.listener_id);
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if (ptr_svc) {
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if (!ptr_svc->unregister_pending) {
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@@ -1577,13 +1589,16 @@ static int qseecom_register_listener(struct qseecom_dev_handle *data,
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new_entry->svc.listener_id = rcvd_lstnr.listener_id;
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new_entry->sb_length = rcvd_lstnr.sb_size;
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new_entry->user_virt_sb_base = rcvd_lstnr.virt_sb_base;
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data->listener.register_pending = true;
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if (__qseecom_set_sb_memory(new_entry, data, &rcvd_lstnr)) {
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pr_err("qseecom_set_sb_memory failed for listener %d, size %d\n",
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rcvd_lstnr.listener_id, rcvd_lstnr.sb_size);
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__qseecom_free_tzbuf(&new_entry->sglistinfo_shm);
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kzfree(new_entry);
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data->listener.register_pending = false;
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return -ENOMEM;
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}
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data->listener.register_pending = false;
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init_waitqueue_head(&new_entry->rcv_req_wq);
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init_waitqueue_head(&new_entry->listener_block_app_wq);
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@@ -2006,6 +2006,24 @@ static void dwc3_gsi_event_buf_alloc(struct dwc3 *dwc)
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}
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}
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static void dwc3_msm_modify_pipectl(struct dwc3 *dwc, bool set)
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{
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struct dwc3_msm *mdwc = dev_get_drvdata(dwc->dev->parent);
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u32 reg;
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reg = dwc3_msm_read_reg(mdwc->base, DWC3_GUSB3PIPECTL(0));
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if (set) {
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if ((dwc->speed != DWC3_DSTS_SUPERSPEED) &&
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(dwc->speed != DWC3_DSTS_SUPERSPEED_PLUS))
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reg |= DWC3_GUSB3PIPECTL_SUSPHY;
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} else {
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reg &= ~(DWC3_GUSB3PIPECTL_SUSPHY);
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}
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dwc3_msm_write_reg(mdwc->base, DWC3_GUSB3PIPECTL(0), reg);
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}
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static void dwc3_msm_notify_event(struct dwc3 *dwc, unsigned int event,
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unsigned int value)
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{
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@@ -2071,6 +2089,9 @@ static void dwc3_msm_notify_event(struct dwc3 *dwc, unsigned int event,
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break;
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case DWC3_CONTROLLER_CONNDONE_EVENT:
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dev_dbg(mdwc->dev, "DWC3_CONTROLLER_CONNDONE_EVENT received\n");
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dwc3_msm_modify_pipectl(dwc, true);
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/*
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* Add power event if the dbm indicates coming out of L1 by
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* interrupt
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@@ -2195,6 +2216,13 @@ static void dwc3_msm_notify_event(struct dwc3 *dwc, unsigned int event,
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break;
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case DWC3_CONTROLLER_NOTIFY_CLEAR_DB:
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dev_dbg(mdwc->dev, "DWC3_CONTROLLER_NOTIFY_CLEAR_DB\n");
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/*
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* Clear the susphy bit here to ensure it is not set during
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* the course of controller initialisation process.
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*/
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dwc3_msm_modify_pipectl(dwc, false);
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if (!mdwc->gsi_ev_buff)
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break;
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@@ -2267,15 +2295,6 @@ static void dwc3_msm_power_collapse_por(struct dwc3_msm *mdwc)
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dev_err(mdwc->dev, "%s: dwc3_core init failed (%d)\n",
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__func__, ret);
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/* Get initial P3 status and enable IN_P3 event */
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if (dwc3_is_usb31(dwc))
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val = dwc3_msm_read_reg_field(mdwc->base,
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DWC31_LINK_GDBGLTSSM,
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DWC3_GDBGLTSSM_LINKSTATE_MASK);
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else
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val = dwc3_msm_read_reg_field(mdwc->base,
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DWC3_GDBGLTSSM, DWC3_GDBGLTSSM_LINKSTATE_MASK);
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atomic_set(&mdwc->in_p3, val == DWC3_LINK_STATE_U3);
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dwc3_msm_write_reg_field(mdwc->base, PWR_EVNT_IRQ_MASK_REG,
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PWR_EVNT_POWERDOWN_IN_P3_MASK, 1);
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@@ -2499,8 +2499,11 @@ static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)
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/* prevent pending bh to run later */
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flush_work(&dwc->bh_work);
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if (is_on)
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dwc3_device_core_soft_reset(dwc);
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if (is_on) {
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ret = dwc3_device_core_soft_reset(dwc);
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if (ret != 0)
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goto done;
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}
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spin_lock_irqsave(&dwc->lock, flags);
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if (dwc->ep0state != EP0_SETUP_PHASE)
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@@ -2529,6 +2532,7 @@ static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)
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}
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enable_irq(dwc->irq);
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done:
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pm_runtime_mark_last_busy(dwc->dev);
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pm_runtime_put_autosuspend(dwc->dev);
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dbg_event(0xFF, "Pullup put",
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