Merge remote-tracking branch 'origin_4.19/tmp-0567d2f' into msm-4.19

* origin_4.19/tmp-0567d2f: Linux 4.19.9 HID: quirks: fix RetroUSB.com devices mac80211: ignore NullFunc frames in the duplicate detection mac80211: fix reordering of buffered broadcast packets mac80211: ignore tx status for PS stations in ieee80211_tx_status_ext mac80211: Clear beacon_int in ieee80211_do_stop mac80211: fix GFP_KERNEL under tasklet context mac80211_hwsim: Timer should be initialized before device registered cfg80211: Fix busy loop regression in ieee80211_ie_split_ric() libnvdimm, pfn: Pad pfn namespaces relative to other regions kgdboc: fix KASAN global-out-of-bounds bug in param_set_kgdboc_var() gnss: sirf: fix activation retry handling tty: do not set TTY_IO_ERROR flag if console port tty: serial: 8250_mtk: always resume the device in probe. Drivers: hv: vmbus: Offload the handling of channels to two workqueues x86/efi: Allocate e820 buffer before calling efi_exit_boot_service kprobes/x86: Fix instruction patching corruption when copying more than one RIP-relative instruction drm/i915: Downgrade Gen9 Plane WM latency error drm/amdgpu/gmc8: always load MC firmware in the driver drm/amdgpu/gmc8: update MC firmware for polaris drm/msm: Move fence put to where failure occurs drm/lease: Send a distinct uevent drm/amdgpu: update mc firmware image for polaris12 variants crypto: do not free algorithm before using Revert commit ef9209b642 "staging: rtl8723bs: Fix indenting errors and an off-by-one mistake in core/rtw_mlme_ext.c" staging: rtl8712: Fix possible buffer overrun cifs: Fix separator when building path from dentry Revert "x86/e820: put !E820_TYPE_RAM regions into memblock.reserved" arm64: dts: rockchip: remove vdd_log from rock960 to fix a stability issues xhci: Prevent U1/U2 link pm states if exit latency is too long xhci: workaround CSS timeout on AMD SNPS 3.0 xHC ARM: 8806/1: kprobes: Fix false positive with FORTIFY_SOURCE dmaengine: cppi41: delete channel from pending list when stop channel dmaengine: imx-sdma: use GFP_NOWAIT for dma descriptor allocations dmaengine: imx-sdma: implement channel termination via worker Revert "dmaengine: imx-sdma: alloclate bd memory from dma pool" Revert "dmaengine: imx-sdma: Use GFP_NOWAIT for dma allocations" dmaengine: dw: Fix FIFO size for Intel Merrifield SUNRPC: Fix leak of krb5p encode pages arm64: hibernate: Avoid sending cross-calling with interrupts disabled vhost/vsock: fix use-after-free in network stack callers virtio/s390: fix race in ccw_io_helper() virtio/s390: avoid race on vcdev->config parisc: Enable -ffunction-sections for modules on 32-bit kernel Revert "mfd: cros_ec: Use devm_kzalloc for private data" media: dvb-pll: don't re-validate tuner frequencies media: dvb-pll: fix tuner frequency ranges media: vicodec: fix memchr() kernel oops media: gspca: fix frame overflow error ALSA: hda/realtek: Fix mic issue on Acer AIO Veriton Z4860G/Z6860G ALSA: hda/realtek: Fix mic issue on Acer AIO Veriton Z4660G ALSA: hda/realtek - Add support for Acer Aspire C24-860 headset mic ALSA: hda/realtek: ALC286 mic and headset-mode fixups for Acer Aspire U27-880 ALSA: hda/realtek - Fix speaker output regression on Thinkpad T570 ALSA: pcm: Fix interval evaluation with openmin/max ALSA: pcm: Call snd_pcm_unlink() conditionally at closing ALSA: pcm: Fix starvation on down_write_nonblock() ALSA: hda: Add support for AMD Stoney Ridge ALSA: usb-audio: Fix UAF decrement if card has no live interfaces in card.c ALSA: usb-audio: Add SMSL D1 to quirks for native DSD support USB: serial: console: fix reported terminal settings USB: check usb_get_extra_descriptor for proper size usb: appledisplay: Add 27" Apple Cinema Display usb: quirk: add no-LPM quirk on SanDisk Ultra Flair device net: amd: add missing of_node_put() team: no need to do team_notify_peers or team_mcast_rejoin when disabling port ibmvnic: Update driver queues after change in ring size support ibmvnic: Fix RX queue buffer cleanup flexfiles: use per-mirror specified stateid for IO NFSv4.2 copy do not allocate memory under the lock iommu/vt-d: Use memunmap to free memremap net: faraday: ftmac100: remove netif_running(netdev) check before disabling interrupts riscv: fix warning in arch/riscv/include/asm/module.h net/ibmnvic: Fix deadlock problem in reset qed: Fix QM getters to always return a valid pq qed: Fix bitmap_weight() check NFSv4: Fix a NFSv4 state manager deadlock net: ena: fix crash during failed resume from hibernation mtd: spi-nor: Fix Cadence QSPI page fault kernel panic HID: multitouch: Add pointstick support for Cirque Touchpad Revert "HID: uhid: use strlcpy() instead of strncpy()" cpufreq: ti-cpufreq: Only register platform_device when supported mtd: rawnand: qcom: Namespace prefix some commands tc-testing: tdc.py: Guard against lack of returncode in executed command tc-testing: tdc.py: ignore errors when decoding stdout/stderr gpio: mockup: fix indicated direction gpio: pxa: fix legacy non pinctrl aware builds again drivers/net/ethernet/qlogic/qed/qed_rdma.h: fix typo net/mlx4: Fix UBSAN warning of signed integer overflow net/mlx4_core: Fix uninitialized variable compilation warning net/mlx4_core: Zero out lkey field in SW2HW_MPT fw command drm/amd/display: Support amdgpu "max bpc" connector property (v2) drm/amdgpu: Add amdgpu "max bpc" connector property (v2) bnxt_en: Fix filling time in bnxt_fill_coredump_record() nvme-fc: resolve io failures during connect s390/ism: clear dmbe_mask bit before SMC IRQ handling Revert "usb: gadget: ffs: Fix BUG when userland exits with submitted AIO transfers" usb: dwc2: pci: Fix an error code in probe qed: Fix reading wrong value in loop condition qed: Fix rdma_info structure allocation qed: Fix overriding offload_tc by protocols without APP TLV qed: Fix PTT leak in qed_drain() bnx2x: Assign unique DMAE channel number for FW DMAE transactions. amd/iommu: Fix Guest Virtual APIC Log Tail Address Register batman-adv: Expand merged fragment buffer for full packet batman-adv: Use explicit tvlv padding for ELP packets HID: input: Ignore battery reported by Symbol DS4308 test_firmware: fix error return getting clobbered can: rcar_can: Fix erroneous registration can: ucan: remove set but not used variable 'udev' scsi: ufs: Fix hynix ufs bug with quirk on hi36xx SoC iommu/ipmmu-vmsa: Fix crash on early domain free mt76: fix building without CONFIG_LEDS_CLASS brcmutil: really fix decoding channel info for 160 MHz bandwidth iommu/vt-d: Fix NULL pointer dereference in prq_event_thread() media: ipu3-cio2: Unregister device nodes first, then release resources media: omap3isp: Unregister media device as first media: cec: check for non-OK/NACK conditions while claiming a LA media: vicodec: lower minimum height to 360 ANDROID: cuttlefish_defconfig: Enable VIRT_WIFI FROMGIT: mac80211-next: rtnetlink wifi simulation device Linux 4.19.8 blk-mq: punt failed direct issue to dispatch list tipc: use destination length for copy string arc: [devboards] Add support of NFSv3 ACL ARC: change defconfig defaults to ARCv2 btrfs: tree-checker: Don't check max block group size as current max chunk size limit is unreliable Input: elan_i2c - add support for ELAN0621 touchpad Input: elan_i2c - add ACPI ID for Lenovo IdeaPad 330-15ARR Input: elan_i2c - add ELAN0620 to the ACPI table Input: cros_ec_keyb - fix button/switch capability reports Input: matrix_keypad - check for errors from of_get_named_gpio() Input: synaptics - add PNP ID for ThinkPad P50 to SMBus Input: xpad - quirk all PDP Xbox One gamepads scsi: lpfc: fix block guard enablement on SLI3 adapters i40e: Fix deletion of MAC filters selinux: add support for RTM_NEWCHAIN, RTM_DELCHAIN, and RTM_GETCHAIN svm: Add mutex_lock to protect apic_access_page_done on AMD systems kgdboc: Fix warning with module build kgdboc: Fix restrict error userfaultfd: shmem: UFFDIO_COPY: set the page dirty if VM_WRITE is not set userfaultfd: shmem: add i_size checks userfaultfd: shmem: allocate anonymous memory for MAP_PRIVATE shmem userfaultfd: use ENOENT instead of EFAULT if the atomic copy user fails drm/meson: Fix OOB memory accesses in meson_viu_set_osd_lut() drm/meson: Enable fast_io in meson_dw_hdmi_regmap_config drm/meson: Fixes for drm_crtc_vblank_on/off support drm: set is_master to 0 upon drm_new_set_master() failure drm/amd/dm: Don't forget to attach MST encoders drm/ast: Fix incorrect free on ioregs tracing/fgraph: Fix set_graph_function from showing interrupts IB/mlx5: Avoid load failure due to unknown link width mips: fix mips_get_syscall_arg o32 check MIPS: ralink: Fix mt7620 nd_sd pinmux tracepoint: Use __idx instead of idx in DO_TRACE macro to make it unique sched, trace: Fix prev_state output in sched_switch tracepoint arm64: ftrace: Fix to enable syscall events on arm64 mtd: nand: Fix memory allocation in nanddev_bbt_init() uprobes: Fix handle_swbp() vs. unregister() + register() race once more iser: set sector for ambiguous mr status errors unifdef: use memcpy instead of strncpy test_hexdump: use memcpy instead of strncpy blk-mq: fix corruption with direct issue ANDROID: cuttlefish_defconfig: Enable CONFIG_ARM64_LSE_ATOMICS ANDROID: Move from clang r328903 to r346389b. Linux 4.19.7 misc: mic/scif: fix copy-paste error in scif_create_remote_lookup Drivers: hv: vmbus: check the creation_status in vmbus_establish_gpadl() mm: use swp_offset as key in shmem_replace_page() mm: cleancache: fix corruption on missed inode invalidation lib/test_kmod.c: fix rmmod double free iio:st_magn: Fix enable device after trigger iio/hid-sensors: Fix IIO_CHAN_INFO_RAW returning wrong values for signed numbers Revert "usb: dwc3: gadget: skip Set/Clear Halt when invalid" usb: core: quirks: add RESET_RESUME quirk for Cherry G230 Stream series USB: usb-storage: Add new IDs to ums-realtek staging: rtl8723bs: Add missing return for cfg80211_rtw_get_station staging: rtl8723bs: Fix incorrect sense of ether_addr_equal staging: mt7621-pinctrl: fix uninitialized variable ngroups staging: mt7621-dma: fix potentially dereferencing uninitialized 'tx_desc' staging: vchiq_arm: fix compat VCHIQ_IOC_AWAIT_COMPLETION staging: most: use format specifier "%s" in snprintf dmaengine: at_hdmac: fix module unloading dmaengine: at_hdmac: fix memory leak in at_dma_xlate() ARM: dts: rockchip: Remove @0 from the veyron memory node ASoC: pcm186x: Fix device reset-registers trigger value ASoC: intel: cht_bsw_max98090_ti: Add quirk for boards using pmc_plt_clk_0 ext2: fix potential use after free ext2: initialize opts.s_mount_opt as zero before using it binder: fix race that allows malicious free of live buffer function_graph: Reverse the order of pushing the ret_stack and the callback function_graph: Move return callback before update of curr_ret_stack function_graph: Have profiler use curr_ret_stack and not depth function_graph: Use new curr_ret_depth to manage depth instead of curr_ret_stack function_graph: Make ftrace_push_return_trace() static MIPS: function_graph: Simplify with function_graph_enter() arm64: function_graph: Simplify with function_graph_enter() s390/function_graph: Simplify with function_graph_enter() riscv/function_graph: Simplify with function_graph_enter() parisc: function_graph: Simplify with function_graph_enter() sparc/function_graph: Simplify with function_graph_enter() sh/function_graph: Simplify with function_graph_enter() powerpc/function_graph: Simplify with function_graph_enter() nds32: function_graph: Simplify with function_graph_enter() x86/function_graph: Simplify with function_graph_enter() microblaze: function_graph: Simplify with function_graph_enter() ARM: function_graph: Simplify with function_graph_enter() function_graph: Create function_graph_enter() to consolidate architecture code ALSA: hda/realtek - Add auto-mute quirk for HP Spectre x360 laptop ALSA: hda/realtek - fix the pop noise on headphone for lenovo laptops ALSA: hda/realtek - fix headset mic detection for MSI MS-B171 ALSA: hda/realtek - Support ALC300 ALSA: hda: Add ASRock N68C-S UCC the power_save blacklist ALSA: sparc: Fix invalid snd_free_pages() at error path ALSA: control: Fix race between adding and removing a user element ALSA: ac97: Fix incorrect bit shift at AC97-SPSA control write ALSA: wss: Fix invalid snd_free_pages() at error path fs: fix lost error code in dio_complete perf/x86/intel: Disallow precise_ip on BTS events perf/x86/intel: Add generic branch tracing check to intel_pmu_has_bts() perf/x86/intel: Move branch tracing setup to the Intel-specific source file x86/fpu: Disable bottom halves while loading FPU registers x86/MCE/AMD: Fix the thresholding machinery initialization order arm64: dts: rockchip: Fix PCIe reset polarity for rk3399-puma-haikou. PCI: Fix incorrect value returned from pcie_get_speed_cap() PCI: dwc: Fix MSI-X EP framework address calculation bug PCI: layerscape: Fix wrong invocation of outbound window disable accessor btrfs: relocation: set trans to be NULL after ending transaction Btrfs: fix race between enabling quotas and subvolume creation Btrfs: fix rare chances for data loss when doing a fast fsync Btrfs: ensure path name is null terminated at btrfs_control_ioctl btrfs: Always try all copies when reading extent buffers udf: Allow mounting volumes with incorrect identification strings xtensa: fix coprocessor part of ptrace_{get,set}xregs xtensa: fix coprocessor context offset definitions xtensa: enable coprocessors that are being flushed KVM: VMX: re-add ple_gap module parameter KVM: X86: Fix scan ioapic use-before-initialization KVM: LAPIC: Fix pv ipis use-before-initialization KVM: x86: Fix kernel info-leak in KVM_HC_CLOCK_PAIRING hypercall KVM: nVMX/nSVM: Fix bug which sets vcpu->arch.tsc_offset to L1 tsc_offset kvm: svm: Ensure an IBPB on all affected CPUs when freeing a vmcb kvm: mmu: Fix race in emulated page table writes userfaultfd: shmem/hugetlbfs: only allow to register VM_MAYWRITE vmas x86/speculation: Provide IBPB always command line options x86/speculation: Add seccomp Spectre v2 user space protection mode x86/speculation: Enable prctl mode for spectre_v2_user x86/speculation: Add prctl() control for indirect branch speculation x86/speculation: Prepare arch_smt_update() for PRCTL mode x86/speculation: Prevent stale SPEC_CTRL msr content x86/speculation: Split out TIF update ptrace: Remove unused ptrace_may_access_sched() and MODE_IBRS x86/speculation: Prepare for conditional IBPB in switch_mm() x86/speculation: Avoid __switch_to_xtra() calls x86/process: Consolidate and simplify switch_to_xtra() code x86/speculation: Prepare for per task indirect branch speculation control x86/speculation: Add command line control for indirect branch speculation x86/speculation: Unify conditional spectre v2 print functions x86/speculataion: Mark command line parser data __initdata x86/speculation: Mark string arrays const correctly x86/speculation: Reorder the spec_v2 code x86/l1tf: Show actual SMT state x86/speculation: Rework SMT state change sched/smt: Expose sched_smt_present static key x86/Kconfig: Select SCHED_SMT if SMP enabled sched/smt: Make sched_smt_present track topology x86/speculation: Reorganize speculation control MSRs update x86/speculation: Rename SSBD update functions x86/speculation: Disable STIBP when enhanced IBRS is in use x86/speculation: Move STIPB/IBPB string conditionals out of cpu_show_common() x86/speculation: Remove unnecessary ret variable in cpu_show_common() x86/speculation: Clean up spectre_v2_parse_cmdline() x86/speculation: Update the TIF_SSBD comment x86/retpoline: Remove minimal retpoline support x86/retpoline: Make CONFIG_RETPOLINE depend on compiler support x86/speculation: Add RETPOLINE_AMD support to the inline asm CALL_NOSPEC variant x86/speculation: Propagate information about RSB filling mitigation to sysfs x86/speculation: Apply IBPB more strictly to avoid cross-process data leak x86/speculation: Enable cross-hyperthread spectre v2 STIBP mitigation tipc: fix lockdep warning during node delete net: phy: add workaround for issue where PHY driver doesn't bind to the device tcp: defer SACK compression after DupThresh net/dim: Update DIM start sample after each DIM iteration virtio-net: fail XDP set if guest csum is negotiated virtio-net: disable guest csum during XDP set net: skb_scrub_packet(): Scrub offload_fwd_mark net: thunderx: set xdp_prog to NULL if bpf_prog_add fails usbnet: ipheth: fix potential recvmsg bug and recvmsg bug 2 s390/qeth: fix length check in SNMP processing rapidio/rionet: do not free skb before reading its length packet: copy user buffers before orphan or clone net: thunderx: set tso_hdrs pointer to NULL in nicvf_free_snd_queue net: gemini: Fix copy/paste error net: don't keep lonely packets forever in the gro hash lan743x: fix return value for lan743x_tx_napi_poll lan743x: Enable driver to work with LAN7431 mm/khugepaged: collapse_shmem() do not crash on Compound mm/khugepaged: collapse_shmem() without freezing new_page mm/khugepaged: minor reorderings in collapse_shmem() mm/khugepaged: collapse_shmem() remember to clear holes mm/khugepaged: fix crashes due to misaccounted holes mm/khugepaged: collapse_shmem() stop if punched or truncated mm/huge_memory: fix lockdep complaint on 32-bit i_size_read() mm/huge_memory: splitting set mapping+index before unfreeze mm/huge_memory: rename freeze_page() to unmap_page() ANDROID: cuttlefish_defconfig: Enable CONFIG_CRYPTO_ADIANTUM FROMGIT: fscrypt: add Adiantum support BACKPORT, FROMGIT: crypto: adiantum - add Adiantum support FROMGIT: crypto: arm/nhpoly1305 - add NEON-accelerated NHPoly1305 FROMGIT: crypto: nhpoly1305 - add NHPoly1305 support FROMGIT: crypto: poly1305 - add Poly1305 core API FROMGIT: crypto: poly1305 - use structures for key and accumulator FROMGIT: crypto: arm/chacha - add XChaCha12 support FROMGIT: crypto: arm/chacha20 - refactor to allow varying number of rounds FROMGIT: crypto: arm/chacha20 - add XChaCha20 support FROMGIT: crypto: arm/chacha20 - limit the preemption-disabled section FROMGIT: crypto: chacha - add XChaCha12 support BACKPORT, FROMGIT: crypto: chacha20-generic - refactor to allow varying number of rounds FROMGIT: crypto: chacha20-generic - add XChaCha20 support FROMGIT: crypto: chacha20-generic - don't unnecessarily use atomic walk FROMGIT: crypto: chacha20-generic - add HChaCha20 library function FROMGIT: crypto: arm/aes - add some hardening against cache-timing attacks UPSTREAM: crypto: arm/chacha20 - faster 8-bit rotations and other optimizations UPSTREAM: crypto: chacha20 - Fix chacha20_block() keystream alignment (again) ANDROID: cuttlefish_defconfig: Enable CONFIG_SDCARD_FS ANDROID: sdcardfs: Add sdcardfs filesystem ANDROID: sdcardfs: Define magic value ANDROID: fs: Restore vfs_path_lookup() export ANDROID: vfs: add d_canonical_path for stacked filesystem support ANDROID: vfs: Add permission2 for filesystems with per mount permissions ANDROID: vfs: Add setattr2 for filesystems with per mount permissions ANDROID: vfs: Allow filesystems to access their private mount data ANDROID: mnt: Add filesystem private data to mount points ANDROID: sdcardfs: Enable modular sdcardfs Revert "proc: Convert proc_mount to use mount_ns." ANDROID: binder: add support for RT prio inheritance. UPSTREAM: binder: Add BINDER_GET_NODE_INFO_FOR_REF ioctl. ANDROID: net: ipv6: autoconf routes into per-device tables ANDROID: cuttlefish_defconfig: Enable SECURITY_PERF_EVENTS_RESTRICT ANDROID: security,perf: Allow further restriction of perf_event_open ANDROID: netfilter: xt_IDLETIMER: Add new netlink msg type ANDROID: cuttlefish_defconfig: Enable CONFIG_NETFILTER_XT_MATCH_QUOTA2 ANDROID: netfilter: xt_quota2: adding the original quota2 from xtables-addons ANDROID: power: wakeup_reason: add an API to log wakeup reasons ANDROID: trace: sched: add sched blocked tracepoint which dumps out context of sleep. ANDROID: add extra free kbytes tunable CHROMIUM: cgroups: relax permissions on moving tasks between cgroups ANDROID: cpu: send KOBJ_ONLINE event when enabling cpus ANDROID: fs: FS tracepoints to track IO. ANDROID: cuttlefish_defconfig: Enable CONFIG_DM_VERITY_AVB ANDROID: AVB error handler to invalidate vbmeta partition. ANDROID: cuttlefish_defconfig: Enable CONFIG_CPUSETS ANDROID: cpuset: Make cpusets restore on hotplug ANDROID: taskstats: track fsync syscalls ANDROID: uid_cputime: add per-uid IO usage accounting ANDROID: cuttlefish_defconfig: Enable CONFIG_UID_SYS_STATS ANDROID: uid_cputime: Adds accounting for the cputimes per uid. ANDROID: cuttlefish_defconfig: Enable CONFIG_MMC ANDROID: mmc: core: Add "ignore mmc pm notify" functionality ANDROID: cuttlefish_defconfig: Enable CONFIG_USB_CONFIGFS_F_AUDIO_SRC ANDROID: usb: gadget: f_audio_source: New gadget driver for audio output ANDROID: usb: gadget: f_midi: set fi->f to NULL when free f_midi function ANDROID: usb: gadget: f_midi: create F_midi device ANDROID: cuttlefish_defconfig: Enable CONFIG_USB_CONFIGFS_F_ACC ANDROID: usb: gadget: f_accessory: Add Android Accessory function ANDROID: usb: gadget: configfs: Add device attribute to determine gadget state ANDROID: usb: gadget: configfs: Add "state" attribute to android_device ANDROID: cuttlefish_defconfig: Enable CONFIG_USB_CONFIGFS_UEVENT ANDROID: usb: gadget: configfs: Add function devices to the parent ANDROID: usb: gadget: configfs: Add Uevent to notify userspace ANDROID: usb: gadget: configfs: Add usb_function ptr to fi struct ANDROID: mm: add a field to store names for private anonymous memory ANDROID: fs: epoll: use freezable blocking call ANDROID: cuttlefish_defconfig: Enable CONFIG_CMDLINE_EXTEND ANDROID: of: Support CONFIG_CMDLINE_EXTEND config option ANDROID: arm64: copy CONFIG_CMDLINE_EXTEND from ARM UPSTREAM: tcp: start receiver buffer autotuning sooner UPSTREAM: tcp: up initial rmem to 128KB and SYN rwin to around 64KB ANDROID: net: xfrm: make PF_KEY SHA256 use RFC-compliant truncation. ANDROID: cuttlefish_defconfig: Enable EAS related defines BACKPORT: sched/fair: Fix cpu_util_wake() for 'execl' type workloads ANDROID: defconfig / build config for cuttlefish ANDROID: Kbuild, LLVMLinux: allow overriding clang target triple ANDROID: x86: Remove a useless warning message Revert "x86: Force asm-goto" Revert "x86: Allow generating user-space headers without a compiler" Linux 4.19.6 media: ov5640: fix auto controls values when switching to manual mode media: ov5640: fix wrong binning value in exposure calculation media: ov5640: fix auto gain & exposure when changing mode media: ov5640: fix exposure regression media: ov5640: Fix timings setup code media: ov5640: Re-work MIPI startup sequence rcu: Make need_resched() respond to urgent RCU-QS needs gfs2: Fix iomap buffer head reference counting bug tty: wipe buffer if not echoing data tty: wipe buffer. include/linux/pfn_t.h: force '~' to be parsed as an unary operator dax: Avoid losing wakeup in dax_lock_mapping_entry mm, page_alloc: check for max order in hot path tmpfs: make lseek(SEEK_DATA/SEK_HOLE) return ENXIO with a negative offset mm, memory_hotplug: check zone_movable in has_unmovable_pages z3fold: fix possible reclaim races efi/arm: Revert deferred unmap of early memmap mapping powerpc/numa: Suppress "VPHN is not supported" messages NFSv4: Fix an Oops during delegation callbacks kdb: Use strscpy with destination buffer size drm/amdgpu: fix bug with IH ring setup RISC-V: Silence some module warnings on 32-bit riscv: add missing vdso_install target SUNRPC: Fix a bogus get/put in generic_key_to_expire() block: copy ioprio in __bio_clone_fast() and bounce perf/x86/intel/uncore: Add more IMC PCI IDs for KabyLake and CoffeeLake CPUs sched/fair: Fix cpu_util_wake() for 'execl' type workloads powerpc/io: Fix the IO workarounds code to work with Radix floppy: fix race condition in __floppy_read_block_0() crypto: simd - correctly take reqsize of wrapped skcipher into account rtc: pcf2127: fix a kmemleak caused in pcf2127_i2c_gather_write rtc: cmos: Do not export alarm rtc_ops when we do not support alarms cpufreq: imx6q: add return value check for voltage scale KVM: PPC: Move and undef TRACE_INCLUDE_PATH/FILE scsi: hisi_sas: Remove set but not used variable 'dq_list' scsi: lpfc: fix remoteport access tools/testing/nvdimm: Fix the array size for dimm devices. pinctrl: meson: fix meson8b ao pull register bits pinctrl: meson: fix meson8 ao pull register bits pinctrl: meson: fix gxl ao pull register bits pinctrl: meson: fix gxbb ao pull register bits pinctrl: meson: fix pinconf bias disable fanotify: fix handling of events on child sub-directory fsnotify: generalize handling of extra event flags IB/hfi1: Eliminate races in the SDMA send error path ACPICA: AML interpreter: add region addresses in global list during initialization can: flexcan: remove not needed struct flexcan_priv::tx_mb and struct flexcan_priv::tx_mb_idx can: flexcan: Always use last mailbox for TX can: hi311x: Use level-triggered interrupt can: raw: check for CAN FD capable netdev in raw_sendmsg() can: flexcan: handle tx-complete CAN frames via rx-offload infrastructure can: flexcan: use can_rx_offload_queue_sorted() for flexcan_irq_bus_*() can: rx-offload: rename can_rx_offload_irq_queue_err_skb() to can_rx_offload_queue_tail() can: rx-offload: introduce can_rx_offload_get_echo_skb() and can_rx_offload_queue_sorted() functions can: dev: __can_get_echo_skb(): print error message, if trying to echo non existing skb can: dev: __can_get_echo_skb(): Don't crash the kernel if can_priv::echo_skb is accessed out of bounds can: dev: __can_get_echo_skb(): replace struct can_frame by canfd_frame to access frame length can: dev: can_get_echo_skb(): factor out non sending code to __can_get_echo_skb() can: flexcan: Unlock the MB unconditionally drm/ast: Remove existing framebuffers before loading driver drm/ast: fixed cursor may disappear sometimes drm/ast: change resolution may cause screen blurred drm/i915: Disable LP3 watermarks on all SNB machines drm/amdgpu: Fix oops when pp_funcs->switch_power_profile is unset drm/vc4: Set ->legacy_cursor_update to false when doing non-async updates drm/amdgpu: Add missing firmware entry for HAINAN drm/fb-helper: Blacklist writeback when adding connectors to fbdev tcp: do not release socket ownership in tcp_close() mm/memory.c: recheck page table entry with page table lock held mm: don't warn about large allocations for slab llc: do not use sk_eat_skb() gfs2: Don't leave s_fs_info pointing to freed memory in init_sbd sctp: clear the transport of some out_chunk_list chunks in sctp_assoc_rm_peer bfs: add sanity check at bfs_fill_super() Input: synaptics - avoid using uninitialized variable when probing selinux: Add __GFP_NOWARN to allocation at str_read() v9fs_dir_readdir: fix double-free on p9stat_read error tools/power/cpupower: fix compilation with STATIC=true opp: ti-opp-supply: Correct the supply in _get_optimal_vdd_voltage call opp: ti-opp-supply: Dynamically update u_volt_min brcmfmac: fix reporting support for 160 MHz channels iwlwifi: mvm: don't use SAR Geo if basic SAR is not used iwlwifi: mvm: fix regulatory domain update when the firmware starts iwlwifi: mvm: support sta_statistics() even on older firmware iwlwifi: fix wrong WGDS_WIFI_DATA_SIZE gpio: don't free unallocated ida on gpiochip_add_data_with_key() error path mmc: sdhci-pci: Workaround GLK firmware failing to restore the tuning value mmc: sdhci-pci: Try "cd" for card-detect lookup before using NULL Documentation/security-bugs: Postpone fix publication in exceptional cases Documentation/security-bugs: Clarify treatment of embargoed information MAINTAINERS: Add Sasha as a stable branch maintainer ALSA: oss: Use kvzalloc() for local buffer allocations usb: xhci: Prevent bus suspend if a port connect change or polling state is detected xhci: Add quirk to workaround the errata seen on Cavium Thunder-X2 Soc usb: xhci: fix timeout for transition from RExit to U0 usb: xhci: fix uninitialized completion when USB3 port got wrong status xhci: Add check for invalid byte size error when UAS devices are connected. xhci: handle port status events for removed USB3 hcd xhci: Fix leaking USB3 shared_hcd at xhci removal usb: dwc3: Fix NULL pointer exception in dwc3_pci_remove() usb: dwc3: core: Clean up ULPI device usb: dwc3: gadget: Properly check last unaligned/zero chain TRB usb: dwc3: gadget: fix ISOC TRB type on unaligned transfers usb: core: Fix hub port connection events lost efi/libstub: arm: support building with clang HID: steam: remove input device when a hid client is running. Linux 4.19.5 mt76x0: run vco calibration for each channel configuration libceph: fall back to sendmsg for slab pages HID: Add quirk for Microsoft PIXART OEM mouse HID: Add quirk for Primax PIXART OEM mice HID: uhid: forbid UHID_CREATE under KERNEL_DS or elevated privileges ACPI / platform: Add SMB0001 HID to forbidden_id_list drivers/misc/sgi-gru: fix Spectre v1 vulnerability mtd: rawnand: atmel: fix OF child-node lookup gnss: sirf: fix synchronous write timeout gnss: serial: fix synchronous write timeout USB: misc: appledisplay: add 20" Apple Cinema Display misc: atmel-ssc: Fix section annotation on atmel_ssc_get_driver_data usb: quirks: Add delay-init quirk for Corsair K70 LUX RGB USB: Wait for extra delay time after USB_PORT_FEAT_RESET for quirky hub USB: quirks: Add no-lpm quirk for Raydium touchscreens usb: cdc-acm: add entry for Hiro (Conexant) modem can: kvaser_usb: Fix potential uninitialized variable use can: kvaser_usb: Fix accessing freed memory in kvaser_usb_start_xmit() ALSA: hda/ca0132 - Call pci_iounmap() instead of iounmap() ALSA: hda/realtek - Add quirk entry for HP Pavilion 15 uio: Fix an Oops on load RISC-V: Fix raw_copy_{to,from}_user() MIPS: OCTEON: cavium_octeon_defconfig: re-enable OCTEON USB driver media: v4l: event: Add subscription to list before calling "add" operation x86/ldt: Remove unused variable in map_ldt_struct() x86/ldt: Unmap PTEs for the slot before freeing LDT pages x86/mm: Move LDT remap out of KASLR region on 5-level paging SUNRPC: drop pointless static qualifier in xdr_get_next_encode_buffer() Revert "scripts/setlocalversion: git: Make -dirty check more robust" kbuild: deb-pkg: fix too low build version number net: aquantia: invalid checksumm offload implementation net: aquantia: fixed enable unicast on 32 macvlan net: aquantia: fix potential IOMMU fault after driver unbind net: stmmac: Fix RX packet size > 8191 qed: Fix potential memory corruption qed: Fix SPQ entries not returned to pool in error flows qed: Fix blocking/unlimited SPQ entries leak qed: Fix memory/entry leak in qed_init_sp_request() i40e: restore NETIF_F_GSO_IPXIP[46] to netdev features ice: Change req_speeds to be u16 ice: Fix the bytecount sent to netdev_tx_sent_queue ice: Fix dead device link issue with flow control perf tools: Do not zero sample_id_all for group members perf tools: Fix undefined symbol scnprintf in libperf-jvmti.so sched/core: Take the hotplug lock in sched_init_smp() i2c: qcom-geni: Fix runtime PM mismatch with child devices i2c: omap: Enable for ARCH_K3 nvme: make sure ns head inherits underlying device limits of/device: Really only set bus DMA mask when appropriate ceph: quota: fix null pointer dereference in quota check s390/perf: Change CPUM_CF return code in event init function drm/amd/amdgpu/dm: Fix dm_dp_create_fake_mst_encoder() drm/amd/display: Drop reusing drm connector for MST block: Clear kernel memory before copying to user drm/amd/display: Stop leaking planes lib/raid6: Fix arm64 test build mtd: nand: Fix nanddev_pos_next_page() kernel-doc header clk: fixed-factor: fix of_node_get-put imbalance xen/grant-table: Fix incorrect gnttab_dma_free_pages() pr_debug message arm64: dts: renesas: condor: switch from EtherAVB to GEther arm64: dts: renesas: r8a7795: add missing dma-names on hscif2 Revert "drm/exynos/decon5433: implement frame counter" ARM: dts: fsl: Fix improperly quoted stdout-path values ARM: dts: imx6sll: fix typo for fsl,imx6sll-i2c node hwmon: (ibmpowernv) Remove bogus __init annotations net: hns3: Fix for out-of-bounds access when setting pfc back pressure s390/qeth: unregister netdevice only when registered s390/qeth: fix HiperSockets sniffer netfilter: nft_compat: ebtables 'nat' table is normal chain type netfilter: ipset: Fix calling ip_set() macro at dumping netfilter: xt_IDLETIMER: add sysfs filename checking routine netfilter: ipset: Correct rcu_dereference() call in ip_set_put_comment() bpf: fix bpf_prog_get_info_by_fd to return 0 func_lens for unpriv s390/mm: Fix ERROR: "__node_distance" undefined! s390/mm: fix mis-accounting of pgtable_bytes netfilter: ipset: fix ip_set_list allocation failure netfilter: ipset: actually allow allowable CIDR 0 in hash:net,port,net netfilter: ipset: list:set: Decrease refcount synchronously on deletion and replace Revert "netfilter: nft_numgen: add map lookups for numgen random operations" HID: alps: allow incoming reports when only the trackstick is opened Revert "HID: add NOGET quirk for Eaton Ellipse MAX UPS" HID: i2c-hid: Add a small delay after sleep command for Raydium touchpanel s390/vdso: add missing FORCE to build targets s390/decompressor: add missing FORCE to build targets netfilter: bridge: define INT_MIN & INT_MAX in userspace netfilter: ipv6: fix oops when defragmenting locally generated fragments serial: sh-sci: Fix receive on SCIFA/SCIFB variants with DMA clk: ti: fix OF child-node lookup clk: renesas: r9a06g032: Fix UART34567 clock rate clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessary arm64: percpu: Initialize ret in the default case clk: meson-axg: pcie: drop the mpll3 clock parent platform/x86: acerhdf: Add BIOS entry for Gateway LT31 v1.3307 x86/earlyprintk: Add a force option for pciserial device apparmor: Fix uninitialized value in aa_split_fqname clk: samsung: exynos5420: Enable PERIS clocks for suspend fs/exofs: fix potential memory leak in mount option parsing perf symbols: Set PLT entry/header sizes properly on Sparc clk: fixed-rate: fix of_node_get-put imbalance platform/x86: intel_telemetry: report debugfs failure afs: Handle EIO from delivery function drm/edid: Add 6 bpc quirk for BOE panel. um: Give start_idle_thread() a return code perf unwind: Take pgoff into account when reporting elf to libdwfl hfsplus: prevent btree data loss on root split hfs: prevent btree data loss on root split reiserfs: propagate errors from fill_with_dentries() properly ixgbe: fix MAC anti-spoofing filter after VFLR net: hns3: bugfix for the initialization of command queue's spin lock net: hns3: bugfix for handling mailbox while the command queue reinitialized net: hns3: bugfix for rtnl_lock's range in the hclge_reset() net: hns3: bugfix for rtnl_lock's range in the hclgevf_reset() block: brd: associate with queue until adding disk arm64: kprobe: make page to RO mode when allocate it cifs: fix return value for cifs_listxattr cifs: don't dereference smb_file_target before null check drm/i915: Replace some PAGE_SIZE with I915_GTT_PAGE_SIZE f2fs: fix to keep project quota consistent f2fs: guarantee journalled quota data by checkpoint f2fs: cleanup dirty pages if recover failed f2fs: fix data corruption issue with hardware encryption f2fs: fix to recover inode->i_flags of inode block during POR f2fs: spread f2fs_set_inode_flags() f2fs: fix to spread clear_cold_data() Revert "f2fs: fix to clear PG_checked flag in set_page_dirty()" f2fs: account read IOs and use IO counts for is_idle f2fs: fix to account IO correctly for cgroup writeback f2fs: fix to account IO correctly f2fs: remove request_list check in is_idle() f2fs: allow to mount, if quota is failed f2fs: update REQ_TIME in f2fs_cross_rename() f2fs: do not update REQ_TIME in case of error conditions f2fs: remove unneeded disable_nat_bits() f2fs: remove unused sbi->trigger_ssr_threshold f2fs: shrink sbi->sb_lock coverage in set_file_temperature() f2fs: use rb_*_cached friends f2fs: fix to recover cold bit of inode block during POR f2fs: submit cached bio to avoid endless PageWriteback f2fs: checkpoint disabling f2fs: clear PageError on the read path f2fs: allow out-place-update for direct IO in LFS mode f2fs: refactor ->page_mkwrite() flow Revert: "f2fs: check last page index in cached bio to decide submission" f2fs: support superblock checksum f2fs: add to account skip count of background GC f2fs: add to account meta IO f2fs: keep lazytime on remount f2fs: fix missing up_read f2fs: return correct errno in f2fs_gc f2fs: avoid f2fs_bug_on if f2fs_get_meta_page_nofail got EIO f2fs: mark inode dirty explicitly in recover_inode() f2fs: fix to recover inode's crtime during POR f2fs: fix to recover inode's i_gc_failures during POR f2fs: fix to recover inode's i_flags during POR f2fs: fix to recover inode's project id during POR f2fs: update i_size after DIO completion f2fs: report ENOENT correctly in f2fs_rename f2fs: fix remount problem of option io_bits f2fs: fix to recover inode's uid/gid during POR f2fs: avoid infinite loop in f2fs_alloc_nid f2fs: add new idle interval timing for discard and gc paths f2fs: split IO error injection according to RW f2fs: add SPDX license identifiers f2fs: surround fault_injection related option parsing using CONFIG_F2FS_FAULT_INJECTION f2fs: fix setattr project check upon fssetxattr ioctl f2fs: avoid sleeping under spin_lock f2fs: plug readahead IO in readdir() f2fs: fix to do sanity check with current segment number f2fs: fix memory leak of percpu counter in fill_super() f2fs: fix memory leak of write_io in fill_super() f2fs: cache NULL when both default_acl and acl are NULL f2fs: fix to flush all dirty inodes recovered in readonly fs f2fs: report error if quota off error during umount f2fs: submit bio after shutdown f2fs: avoid wrong decrypted data from disk Revert "f2fs: use printk_ratelimited for f2fs_msg" f2fs: fix unnecessary periodic wakeup of discard thread when dev is busy f2fs: fix to avoid NULL pointer dereference on se->discard_map f2fs: add additional sanity check in f2fs_acl_from_disk() ANDROID: arm64: defconfig: Enable CONFIG_SCHED_TUNE ANDROID: thermal: cpu_cooling: Migrate to using the EM framework ANDROID: Add hold functionality to schedtune CPU boost ANDROID: sched/rt: Add schedtune accounting to rt task enqueue/dequeue ANDROID: sched: Make the cpu_util* accessors available without sugov ANDROID: sched/events: Introduce overutilized trace event ANDROID: sched/events: Introduce rt_rq load tracking trace event ANDROID: sched/events: Introduce schedtune trace events ANDROID: sched/events: Introduce find_best_target trace event ANDROID: sched/events: Introduce util_est trace events ANDROID: sched/events: Introduce task_group load tracking trace event ANDROID: sched/events: Introduce sched_entity load tracking trace event ANDROID: sched/events: Introduce cfs_rq load tracking trace event ANDROID: sched/autogroup: Define autogroup_path() for !CONFIG_SCHED_DEBUG ANDROID: sched/fair: Also do misfit in overloaded groups ANDROID: sched/fair: Don't balance misfits if it would overload local group ANDROID: sched/fair: Attempt to improve throughput for asym cap systems ANDROID: cpufreq/schedutil: add up/down frequency transition rate limits ANDROID: cpufreq/schedutil: Select frequency using util_avg for RT ANDROID: sched: Update max cpu capacity in case of max frequency constraints ANDROID: arm: enable max frequency capping ANDROID: arm64: enable max frequency capping ANDROID: implement max frequency capping ANDROID: sched/fair: add arch scaling function for max frequency capping ANDROID: sched/fair: Bypass energy computation for prefer_idle tasks ANDROID: sched: fair: Bypass energy-aware wakeup for prefer-idle tasks FROMLIST: sched/fair: Use wake_q length as a hint for wake_wide ANDROID: sched: Unconditionally honor sync flag for energy-aware wakeups ANDROID: Add find_best_target to minimise energy calculation overhead ANDROID: sched/fair: Factor out CPU selection from find_energy_efficient_cpu ANDROID: sched: Introduce sysctl_sched_cstate_aware ANDROID: sched, cpuidle: Track cpuidle state index in the scheduler ANDROID: sched: fair/tune: Add schedtune with cgroups interface ANDROID: drivers: Introduce a legacy Energy Model loading driver ANDROID: cpufreq: scmi: Register an Energy Model UPSTREAM: firmware: arm_scmi: add a getter for power of performance states ANDROID: cpufreq: arm_big_little: Register an Energy Model ANDROID: cpufreq: scpi: Register an Energy Model ANDROID: PM / OPP: cpufreq-dt: Move power estimation function FROMLIST: cpufreq: dt: Register an Energy Model ANDROID: arm: dts: vexpress-v2p-ca15_a7: Add dynamic-power-coefficient properties ANDROID: arm64: dts: juno-r2: Add dynamic-power-coefficient properties ANDROID: arm64: dts: juno: Add dynamic-power-coefficient properties ANDROID: arm, arm64: Enable kernel config options required for EAS ANDROID: sched: Enable idle balance to pull single task towards cpu with higher capacity ANDROID: sched: Prevent unnecessary active balance of single task in sched group FROMLIST: sched/fair: Select an energy-efficient CPU on task wake-up FROMLIST: sched/fair: Introduce an energy estimation helper function FROMLIST: sched: Add over-utilization/tipping point indicator FROMLIST: sched/fair: Clean-up update_sg_lb_stats parameters FROMLIST: sched: Introduce a sysctl for Energy Aware Scheduling FROMLIST: sched: Introduce sched_energy_present static key FROMLIST: sched/topology: Make Energy Aware Scheduling depend on schedutil FROMLIST: sched/topology: Disable EAS on inappropriate platforms FROMLIST: sched/topology: Lowest CPU asymmetry sched_domain level pointer FROMLIST: sched/topology: Reference the Energy Model of CPUs when available FROMLIST: PM / EM: Expose the Energy Model in sysfs FROMLIST: PM: Introduce an Energy Model management framework FROMLIST: sched/cpufreq: Prepare schedutil for Energy Aware Scheduling FROMLIST: sched: Relocate arch_scale_cpu_capacity UPSTREAM: sched/core: Disable SD_PREFER_SIBLING on asymmetric CPU capacity domains UPSTREAM: sched/fair: Don't move tasks to lower capacity CPUs unless necessary UPSTREAM: sched/fair: Set rq->rd->overload when misfit UPSTREAM: sched/fair: Wrap rq->rd->overload accesses with READ/WRITE_ONCE() UPSTREAM: sched/core: Change root_domain->overload type to int UPSTREAM: sched/fair: Change 'prefer_sibling' type to bool UPSTREAM: sched/fair: Kick nohz balance if rq->misfit_task_load UPSTREAM: sched/fair: Consider misfit tasks when load-balancing UPSTREAM: sched/fair: Add sched_group per-CPU max capacity UPSTREAM: sched/fair: Add 'group_misfit_task' load-balance type UPSTREAM: sched/topology: Add static_key for asymmetric CPU capacity optimizations UPSTREAM: sched/topology, arch/arm: Rebuild sched_domain hierarchy when CPU capacity changes UPSTREAM: sched/topology, arch/arm64: Rebuild the sched_domain hierarchy when the CPU capacity changes UPSTREAM: sched/topology, drivers/base/arch_topology: Rebuild the sched_domain hierarchy when capacities change UPSTREAM: sched/topology: Add SD_ASYM_CPUCAPACITY flag detection Change-Id: I19fafa34b3fd39c4125708cb5c9c5a7634c40ec4 Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
2018-12-20 17:41:47 -08:00
parent c67d392d5d 0567d2f487
commit 4ac13bd161
688 changed files with 18217 additions and 4614 deletions
--- a/Documentation/ABI/testing/sysfs-fs-f2fs
+++ b/Documentation/ABI/testing/sysfs-fs-f2fs
@@ -121,7 +121,22 @@ What:		/sys/fs/f2fs/<disk>/idle_interval
 Date:		January 2016
 Contact:	"Jaegeuk Kim" <jaegeuk@kernel.org>
 Description:
-		 Controls the idle timing.
+		 Controls the idle timing for all paths other than
 		 discard and gc path.
 What:		/sys/fs/f2fs/<disk>/discard_idle_interval
 Date:		September 2018
 Contact:	"Chao Yu" <yuchao0@huawei.com>
 Contact:	"Sahitya Tummala" <stummala@codeaurora.org>
 Description:
 		 Controls the idle timing for discard path.
 What:		/sys/fs/f2fs/<disk>/gc_idle_interval
 Date:		September 2018
 Contact:	"Chao Yu" <yuchao0@huawei.com>
 Contact:	"Sahitya Tummala" <stummala@codeaurora.org>
 Description:
 		 Controls the idle timing for gc path.
 What:		/sys/fs/f2fs/<disk>/iostat_enable
 Date:		August 2017
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -1070,7 +1070,7 @@
 			earlyprintk=serial[,0x...[,baudrate]]
 			earlyprintk=ttySn[,baudrate]
 			earlyprintk=dbgp[debugController#]
-			earlyprintk=pciserial,bus:device.function[,baudrate]
+			earlyprintk=pciserial[,force],bus:device.function[,baudrate]
 			earlyprintk=xdbc[xhciController#]
 			earlyprintk is useful when the kernel crashes before
@@ -1102,6 +1102,10 @@
 			The sclp output can only be used on s390.
 			The optional "force" to "pciserial" enables use of a
 			PCI device even when its classcode is not of the
 			UART class.
 	edac_report=	[HW,EDAC] Control how to report EDAC event
 			Format: {"on" | "off" | "force"}
 			on: enable EDAC to report H/W event. May be overridden
@@ -4172,9 +4176,13 @@
 	spectre_v2=	[X86] Control mitigation of Spectre variant 2
 			(indirect branch speculation) vulnerability.
 			The default operation protects the kernel from
 			user space attacks.
-			on   - unconditionally enable
+			on   - unconditionally enable, implies
-			off  - unconditionally disable
+			       spectre_v2_user=on
 			off  - unconditionally disable, implies
 			       spectre_v2_user=off
 			auto - kernel detects whether your CPU model is
 			       vulnerable
@@ -4184,6 +4192,12 @@
 			CONFIG_RETPOLINE configuration option, and the
 			compiler with which the kernel was built.
 			Selecting 'on' will also enable the mitigation
 			against user space to user space task attacks.
 			Selecting 'off' will disable both the kernel and
 			the user space protections.
 			Specific mitigations can also be selected manually:
 			retpoline	  - replace indirect branches
@@ -4193,6 +4207,48 @@
 			Not specifying this option is equivalent to
 			spectre_v2=auto.
 	spectre_v2_user=
 			[X86] Control mitigation of Spectre variant 2
 		        (indirect branch speculation) vulnerability between
 		        user space tasks
 			on	- Unconditionally enable mitigations. Is
 				  enforced by spectre_v2=on
 			off     - Unconditionally disable mitigations. Is
 				  enforced by spectre_v2=off
 			prctl   - Indirect branch speculation is enabled,
 				  but mitigation can be enabled via prctl
 				  per thread.  The mitigation control state
 				  is inherited on fork.
 			prctl,ibpb
 				- Like "prctl" above, but only STIBP is
 				  controlled per thread. IBPB is issued
 				  always when switching between different user
 				  space processes.
 			seccomp
 				- Same as "prctl" above, but all seccomp
 				  threads will enable the mitigation unless
 				  they explicitly opt out.
 			seccomp,ibpb
 				- Like "seccomp" above, but only STIBP is
 				  controlled per thread. IBPB is issued
 				  always when switching between different
 				  user space processes.
 			auto    - Kernel selects the mitigation depending on
 				  the available CPU features and vulnerability.
 			Default mitigation:
 			If CONFIG_SECCOMP=y then "seccomp", otherwise "prctl"
 			Not specifying this option is equivalent to
 			spectre_v2_user=auto.
 	spec_store_bypass_disable=
 			[HW] Control Speculative Store Bypass (SSB) Disable mitigation
 			(Speculative Store Bypass vulnerability)
@@ -4690,6 +4746,8 @@
 					prevent spurious wakeup);
 				n = USB_QUIRK_DELAY_CTRL_MSG (Device needs a
 					pause after every control message);
 				o = USB_QUIRK_HUB_SLOW_RESET (Hub needs extra
 					delay after resetting its port);
 			Example: quirks=0781:5580:bk,0a5c:5834:gij
 	usbhid.mousepoll=
--- a/Documentation/admin-guide/security-bugs.rst
+++ b/Documentation/admin-guide/security-bugs.rst
@@ -26,23 +26,35 @@ information is helpful.  Any exploit code is very helpful and will not
 be released without consent from the reporter unless it has already been
 made public.
-Disclosure
+Disclosure and embargoed information
----------
+------------------------------------
-The goal of the Linux kernel security team is to work with the bug
+The security list is not a disclosure channel.  For that, see Coordination
-submitter to understand and fix the bug.  We prefer to publish the fix as
+below.
 soon as possible, but try to avoid public discussion of the bug itself
 and leave that to others.
-Publishing the fix may be delayed when the bug or the fix is not yet
+Once a robust fix has been developed, the release process starts.  Fixes
-fully understood, the solution is not well-tested or for vendor
+for publicly known bugs are released immediately.
-coordination.  However, we expect these delays to be short, measurable in
+
-days, not weeks or months.  A release date is negotiated by the security
+Although our preference is to release fixes for publicly undisclosed bugs
-team working with the bug submitter as well as vendors.  However, the
+as soon as they become available, this may be postponed at the request of
-kernel security team holds the final say when setting a timeframe.  The
+the reporter or an affected party for up to 7 calendar days from the start
-timeframe varies from immediate (esp. if it's already publicly known bug)
+of the release process, with an exceptional extension to 14 calendar days
-to a few weeks.  As a basic default policy, we expect report date to
+if it is agreed that the criticality of the bug requires more time.  The
-release date to be on the order of 7 days.
+only valid reason for deferring the publication of a fix is to accommodate
 the logistics of QA and large scale rollouts which require release
 coordination.
 Whilst embargoed information may be shared with trusted individuals in
 order to develop a fix, such information will not be published alongside
 the fix or on any other disclosure channel without the permission of the
 reporter.  This includes but is not limited to the original bug report
 and followup discussions (if any), exploits, CVE information or the
 identity of the reporter.
 In other words our only interest is in getting bugs fixed.  All other
 information submitted to the security list and any followup discussions
 of the report are treated confidentially even after the embargo has been
 lifted, in perpetuity.
 Coordination
 ------------
@@ -68,7 +80,7 @@ may delay the bug handling. If a reporter wishes to have a CVE identifier
 assigned ahead of public disclosure, they will need to contact the private
 linux-distros list, described above. When such a CVE identifier is known
 before a patch is provided, it is desirable to mention it in the commit
-message, though.
+message if the reporter agrees.
 Non-disclosure agreements
 -------------------------
--- a/Documentation/devicetree/bindings/net/can/holt_hi311x.txt
+++ b/Documentation/devicetree/bindings/net/can/holt_hi311x.txt
@@ -17,7 +17,7 @@ Example:
 		reg = <1>;
 		clocks = <&clk32m>;
 		interrupt-parent = <&gpio4>;
-		interrupts = <13 IRQ_TYPE_EDGE_RISING>;
+		interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
 		vdd-supply = <&reg5v0>;
 		xceiver-supply = <&reg5v0>;
 	};
--- a/Documentation/filesystems/f2fs.txt
+++ b/Documentation/filesystems/f2fs.txt
@@ -172,9 +172,10 @@ fault_type=%d          Support configuring fault injection type, should be
                       FAULT_DIR_DEPTH		0x000000100
                       FAULT_EVICT_INODE	0x000000200
                       FAULT_TRUNCATE		0x000000400
-                       FAULT_IO			0x000000800
+                       FAULT_READ_IO		0x000000800
                       FAULT_CHECKPOINT		0x000001000
                       FAULT_DISCARD		0x000002000
                       FAULT_WRITE_IO		0x000004000
 mode=%s                Control block allocation mode which supports "adaptive"
                       and "lfs". In "lfs" mode, there should be no random
                       writes towards main area.
@@ -211,6 +212,11 @@ fsync_mode=%s          Control the policy of fsync. Currently supports "posix",
                       non-atomic files likewise "nobarrier" mount option.
 test_dummy_encryption  Enable dummy encryption, which provides a fake fscrypt
                       context. The fake fscrypt context is used by xfstests.
 checkpoint=%s          Set to "disable" to turn off checkpointing. Set to "enable"
                       to reenable checkpointing. Is enabled by default. While
                       disabled, any unmounting or unexpected shutdowns will cause
                       the filesystem contents to appear as they did when the
                       filesystem was mounted with that option.
 ================================================================================
 DEBUGFS ENTRIES
--- a/Documentation/filesystems/fscrypt.rst
+++ b/Documentation/filesystems/fscrypt.rst
@@ -132,47 +132,28 @@ designed for this purpose be used, such as scrypt, PBKDF2, or Argon2.
 Per-file keys
 -------------
-Master keys are not used to encrypt file contents or names directly.
+Since each master key can protect many files, it is necessary to
-Instead, a unique key is derived for each encrypted file, including
+"tweak" the encryption of each file so that the same plaintext in two
-each regular file, directory, and symbolic link.  This has several
+files doesn't map to the same ciphertext, or vice versa.  In most
-advantages:
+cases, fscrypt does this by deriving per-file keys.  When a new
 encrypted inode (regular file, directory, or symlink) is created,
 fscrypt randomly generates a 16-byte nonce and stores it in the
 inode's encryption xattr.  Then, it uses a KDF (Key Derivation
 Function) to derive the file's key from the master key and nonce.
- In cryptosystems, the same key material should never be used for
+The Adiantum encryption mode (see `Encryption modes and usage`_) is
-  different purposes.  Using the master key as both an XTS key for
+special, since it accepts longer IVs and is suitable for both contents
-  contents encryption and as a CTS-CBC key for filenames encryption
+and filenames encryption.  For it, a "direct key" option is offered
-  would violate this rule.
+where the file's nonce is included in the IVs and the master key is
- Per-file keys simplify the choice of IVs (Initialization Vectors)
+used for encryption directly.  This improves performance; however,
-  for contents encryption.  Without per-file keys, to ensure IV
+users must not use the same master key for any other encryption mode.
  uniqueness both the inode and logical block number would need to be
  encoded in the IVs.  This would make it impossible to renumber
  inodes, which e.g. ``resize2fs`` can do when resizing an ext4
  filesystem.  With per-file keys, it is sufficient to encode just the
  logical block number in the IVs.
 - Per-file keys strengthen the encryption of filenames, where IVs are
  reused out of necessity.  With a unique key per directory, IV reuse
  is limited to within a single directory.
 - Per-file keys allow individual files to be securely erased simply by
  securely erasing their keys.  (Not yet implemented.)
-A KDF (Key Derivation Function) is used to derive per-file keys from
+Below, the KDF and design considerations are described in more detail.
 the master key.  This is done instead of wrapping a randomly-generated
 key for each file because it reduces the size of the encryption xattr,
 which for some filesystems makes the xattr more likely to fit in-line
 in the filesystem's inode table.  With a KDF, only a 16-byte nonce is
 required --- long enough to make key reuse extremely unlikely.  A
 wrapped key, on the other hand, would need to be up to 64 bytes ---
 the length of an AES-256-XTS key.  Furthermore, currently there is no
 requirement to support unlocking a file with multiple alternative
 master keys or to support rotating master keys.  Instead, the master
 keys may be wrapped in userspace, e.g. as done by the `fscrypt
 <https://github.com/google/fscrypt>`_ tool.
-The current KDF encrypts the master key using the 16-byte nonce as an
+The current KDF works by encrypting the master key with AES-128-ECB,
-AES-128-ECB key.  The output is used as the derived key.  If the
+using the file's nonce as the AES key.  The output is used as the
-output is longer than needed, then it is truncated to the needed
+derived key.  If the output is longer than needed, then it is
-length.  Truncation is the norm for directories and symlinks, since
+truncated to the needed length.
 those use the CTS-CBC encryption mode which requires a key half as
 long as that required by the XTS encryption mode.
 Note: this KDF meets the primary security requirement, which is to
 produce unique derived keys that preserve the entropy of the master
@@ -181,6 +162,20 @@ However, it is nonstandard and has some problems such as being
 reversible, so it is generally considered to be a mistake!  It may be
 replaced with HKDF or another more standard KDF in the future.
 Key derivation was chosen over key wrapping because wrapped keys would
 require larger xattrs which would be less likely to fit in-line in the
 filesystem's inode table, and there didn't appear to be any
 significant advantages to key wrapping.  In particular, currently
 there is no requirement to support unlocking a file with multiple
 alternative master keys or to support rotating master keys.  Instead,
 the master keys may be wrapped in userspace, e.g. as is done by the
 `fscrypt <https://github.com/google/fscrypt>`_ tool.
 Including the inode number in the IVs was considered.  However, it was
 rejected as it would have prevented ext4 filesystems from being
 resized, and by itself still wouldn't have been sufficient to prevent
 the same key from being directly reused for both XTS and CTS-CBC.
 Encryption modes and usage
 ==========================
@@ -191,54 +186,80 @@ Currently, the following pairs of encryption modes are supported:
 - AES-256-XTS for contents and AES-256-CTS-CBC for filenames
 - AES-128-CBC for contents and AES-128-CTS-CBC for filenames
 - Adiantum for both contents and filenames
 If unsure, you should use the (AES-256-XTS, AES-256-CTS-CBC) pair.
 It is strongly recommended to use AES-256-XTS for contents encryption.
 AES-128-CBC was added only for low-powered embedded devices with
 crypto accelerators such as CAAM or CESA that do not support XTS.
 Adiantum is a (primarily) stream cipher-based mode that is fast even
 on CPUs without dedicated crypto instructions.  It's also a true
 wide-block mode, unlike XTS.  It can also eliminate the need to derive
 per-file keys.  However, it depends on the security of two primitives,
 XChaCha12 and AES-256, rather than just one.  See the paper
 "Adiantum: length-preserving encryption for entry-level processors"
 (https://eprint.iacr.org/2018/720.pdf) for more details.  To use
 Adiantum, CONFIG_CRYPTO_ADIANTUM must be enabled.  Also, fast
 implementations of ChaCha and NHPoly1305 should be enabled, e.g.
 CONFIG_CRYPTO_CHACHA20_NEON and CONFIG_CRYPTO_NHPOLY1305_NEON for ARM.
 New encryption modes can be added relatively easily, without changes
 to individual filesystems.  However, authenticated encryption (AE)
 modes are not currently supported because of the difficulty of dealing
 with ciphertext expansion.
 Contents encryption
 -------------------
 For file contents, each filesystem block is encrypted independently.
 Currently, only the case where the filesystem block size is equal to
-the system's page size (usually 4096 bytes) is supported.  With the
+the system's page size (usually 4096 bytes) is supported.
 XTS mode of operation (recommended), the logical block number within
 the file is used as the IV.  With the CBC mode of operation (not
 recommended), ESSIV is used; specifically, the IV for CBC is the
 logical block number encrypted with AES-256, where the AES-256 key is
 the SHA-256 hash of the inode's data encryption key.
-For filenames, the full filename is encrypted at once.  Because of the
+Each block's IV is set to the logical block number within the file as
-requirements to retain support for efficient directory lookups and
+a little endian number, except that:
 filenames of up to 255 bytes, a constant initialization vector (IV) is
 used.  However, each encrypted directory uses a unique key, which
 limits IV reuse to within a single directory.  Note that IV reuse in
 the context of CTS-CBC encryption means that when the original
 filenames share a common prefix at least as long as the cipher block
 size (16 bytes for AES), the corresponding encrypted filenames will
 also share a common prefix.  This is undesirable; it may be fixed in
 the future by switching to an encryption mode that is a strong
 pseudorandom permutation on arbitrary-length messages, e.g. the HEH
 (Hash-Encrypt-Hash) mode.
-Since filenames are encrypted with the CTS-CBC mode of operation, the
+- With CBC mode encryption, ESSIV is also used.  Specifically, each IV
-plaintext and ciphertext filenames need not be multiples of the AES
+  is encrypted with AES-256 where the AES-256 key is the SHA-256 hash
-block size, i.e. 16 bytes.  However, the minimum size that can be
+  of the file's data encryption key.
-encrypted is 16 bytes, so shorter filenames are NUL-padded to 16 bytes
+
-before being encrypted.  In addition, to reduce leakage of filename
+- In the "direct key" configuration (FS_POLICY_FLAG_DIRECT_KEY set in
-lengths via their ciphertexts, all filenames are NUL-padded to the
+  the fscrypt_policy), the file's nonce is also appended to the IV.
-next 4, 8, 16, or 32-byte boundary (configurable).  32 is recommended
+  Currently this is only allowed with the Adiantum encryption mode.
-since this provides the best confidentiality, at the cost of making
+
-directory entries consume slightly more space.  Note that since NUL
+Filenames encryption
-(``\0``) is not otherwise a valid character in filenames, the padding
+--------------------
-will never produce duplicate plaintexts.
+
 For filenames, each full filename is encrypted at once.  Because of
 the requirements to retain support for efficient directory lookups and
 filenames of up to 255 bytes, the same IV is used for every filename
 in a directory.
 However, each encrypted directory still uses a unique key; or
 alternatively (for the "direct key" configuration) has the file's
 nonce included in the IVs.  Thus, IV reuse is limited to within a
 single directory.
 With CTS-CBC, the IV reuse means that when the plaintext filenames
 share a common prefix at least as long as the cipher block size (16
 bytes for AES), the corresponding encrypted filenames will also share
 a common prefix.  This is undesirable.  Adiantum does not have this
 weakness, as it is a wide-block encryption mode.
 All supported filenames encryption modes accept any plaintext length
 >= 16 bytes; cipher block alignment is not required.  However,
 filenames shorter than 16 bytes are NUL-padded to 16 bytes before
 being encrypted.  In addition, to reduce leakage of filename lengths
 via their ciphertexts, all filenames are NUL-padded to the next 4, 8,
 16, or 32-byte boundary (configurable).  32 is recommended since this
 provides the best confidentiality, at the cost of making directory
 entries consume slightly more space.  Note that since NUL (``\0``) is
 not otherwise a valid character in filenames, the padding will never
 produce duplicate plaintexts.
 Symbolic link targets are considered a type of filename and are
-encrypted in the same way as filenames in directory entries.  Each
+encrypted in the same way as filenames in directory entries, except
-symlink also uses a unique key; hence, the hardcoded IV is not a
+that IV reuse is not a problem as each symlink has its own inode.
 problem for symlinks.
 User API
 ========
@@ -272,9 +293,13 @@ This structure must be initialized as follows:
  and FS_ENCRYPTION_MODE_AES_256_CTS (4) for
  ``filenames_encryption_mode``.
- ``flags`` must be set to a value from ``<linux/fs.h>`` which
+- ``flags`` must contain a value from ``<linux/fs.h>`` which
  identifies the amount of NUL-padding to use when encrypting
  filenames.  If unsure, use FS_POLICY_FLAGS_PAD_32 (0x3).
  In addition, if the chosen encryption modes are both
  FS_ENCRYPTION_MODE_ADIANTUM, this can contain
  FS_POLICY_FLAG_DIRECT_KEY to specify that the master key should be
  used directly, without key derivation.
 - ``master_key_descriptor`` specifies how to find the master key in
  the keyring; see `Adding keys`_.  It is up to userspace to choose a
--- a/Documentation/scheduler/sched-tune.txt
+++ b/Documentation/scheduler/sched-tune.txt
@@ -0,0 +1,413 @@
             Central, scheduler-driven, power-performance control
                               (EXPERIMENTAL)
 Abstract
 ========
 The topic of a single simple power-performance tunable, that is wholly
 scheduler centric, and has well defined and predictable properties has come up
 on several occasions in the past [1,2]. With techniques such as a scheduler
 driven DVFS [3], we now have a good framework for implementing such a tunable.
 This document describes the overall ideas behind its design and implementation.
 Table of Contents
 =================
 1. Motivation
 2. Introduction
 3. Signal Boosting Strategy
 4. OPP selection using boosted CPU utilization
 5. Per task group boosting
 6. Per-task wakeup-placement-strategy Selection
 7. Question and Answers
   - What about "auto" mode?
   - What about boosting on a congested system?
   - How CPUs are boosted when we have tasks with multiple boost values?
 8. References
 1. Motivation
 =============
 Sched-DVFS [3] was a new event-driven cpufreq governor which allows the
 scheduler to select the optimal DVFS operating point (OPP) for running a task
 allocated to a CPU. Later, the cpufreq maintainers introduced a similar
 governor, schedutil. The introduction of schedutil also enables running
 workloads at the most energy efficient OPPs.
 However, sometimes it may be desired to intentionally boost the performance of
 a workload even if that could imply a reasonable increase in energy
 consumption. For example, in order to reduce the response time of a task, we
 may want to run the task at a higher OPP than the one that is actually required
 by it's CPU bandwidth demand.
 This last requirement is especially important if we consider that one of the
 main goals of the utilization-driven governor component is to replace all
 currently available CPUFreq policies. Since sched-DVFS and schedutil are event
 based, as opposed to the sampling driven governors we currently have, they are
 already more responsive at selecting the optimal OPP to run tasks allocated to
 a CPU. However, just tracking the actual task load demand may not be enough
 from a performance standpoint.  For example, it is not possible to get
 behaviors similar to those provided by the "performance" and "interactive"
 CPUFreq governors.
 This document describes an implementation of a tunable, stacked on top of the
 utilization-driven governors which extends their functionality to support task
 performance boosting.
 By "performance boosting" we mean the reduction of the time required to
 complete a task activation, i.e. the time elapsed from a task wakeup to its
 next deactivation (e.g. because it goes back to sleep or it terminates).  For
 example, if we consider a simple periodic task which executes the same workload
 for 5[s] every 20[s] while running at a certain OPP, a boosted execution of
 that task must complete each of its activations in less than 5[s].
 A previous attempt [5] to introduce such a boosting feature has not been
 successful mainly because of the complexity of the proposed solution. Previous
 versions of the approach described in this document exposed a single simple
 interface to user-space.  This single tunable knob allowed the tuning of
 system wide scheduler behaviours ranging from energy efficiency at one end
 through to incremental performance boosting at the other end.  This first
 tunable affects all tasks. However, that is not useful for Android products
 so in this version only a more advanced extension of the concept is provided
 which uses CGroups to boost the performance of only selected tasks while using
 the energy efficient default for all others.
 The rest of this document introduces in more details the proposed solution
 which has been named SchedTune.
 2. Introduction
 ===============
 SchedTune exposes a simple user-space interface provided through a new
 CGroup controller 'stune' which provides two power-performance tunables
 per group:
  /<stune cgroup mount point>/schedtune.prefer_idle
  /<stune cgroup mount point>/schedtune.boost
 The CGroup implementation permits arbitrary user-space defined task
 classification to tune the scheduler for different goals depending on the
 specific nature of the task, e.g. background vs interactive vs low-priority.
 More details are given in section 5.
 2.1 Boosting
 ============
 The boost value is expressed as an integer in the range [-100..0..100].
 A value of 0 (default) configures the CFS scheduler for maximum energy
 efficiency. This means that sched-DVFS runs the tasks at the minimum OPP
 required to satisfy their workload demand.
 A value of 100 configures scheduler for maximum performance, which translates
 to the selection of the maximum OPP on that CPU.
 A value of -100 configures scheduler for minimum performance, which translates
 to the selection of the minimum OPP on that CPU.
 The range between -100, 0 and 100 can be set to satisfy other scenarios suitably.
 For example to satisfy interactive response or depending on other system events
 (battery level etc).
 The overall design of the SchedTune module is built on top of "Per-Entity Load
 Tracking" (PELT) signals and sched-DVFS by introducing a bias on the Operating
 Performance Point (OPP) selection.
 Each time a task is allocated on a CPU, cpufreq is given the opportunity to tune
 the operating frequency of that CPU to better match the workload demand. The
 selection of the actual OPP being activated is influenced by the boost value
 for the task CGroup.
 This simple biasing approach leverages existing frameworks, which means minimal
 modifications to the scheduler, and yet it allows to achieve a range of
 different behaviours all from a single simple tunable knob.
 In EAS schedulers, we use boosted task and CPU utilization for energy
 calculation and energy-aware task placement.
 2.2 prefer_idle
 ===============
 This is a flag which indicates to the scheduler that userspace would like
 the scheduler to focus on energy or to focus on performance.
 A value of 0 (default) signals to the CFS scheduler that tasks in this group
 can be placed according to the energy-aware wakeup strategy.
 A value of 1 signals to the CFS scheduler that tasks in this group should be
 placed to minimise wakeup latency.
 The value is combined with the boost value - task placement will not be
 boost aware however CPU OPP selection is still boost aware.
 Android platforms typically use this flag for application tasks which the
 user is currently interacting with.
 3. Signal Boosting Strategy
 ===========================
 The whole PELT machinery works based on the value of a few load tracking signals
 which basically track the CPU bandwidth requirements for tasks and the capacity
 of CPUs. The basic idea behind the SchedTune knob is to artificially inflate
 some of these load tracking signals to make a task or RQ appears more demanding
 that it actually is.
 Which signals have to be inflated depends on the specific "consumer".  However,
 independently from the specific (signal, consumer) pair, it is important to
 define a simple and possibly consistent strategy for the concept of boosting a
 signal.
 A boosting strategy defines how the "abstract" user-space defined
 sched_cfs_boost value is translated into an internal "margin" value to be added
 to a signal to get its inflated value:
  margin         := boosting_strategy(sched_cfs_boost, signal)
  boosted_signal := signal + margin
 Different boosting strategies were identified and analyzed before selecting the
 one found to be most effective.
 Signal Proportional Compensation (SPC)
 --------------------------------------
 In this boosting strategy the sched_cfs_boost value is used to compute a
 margin which is proportional to the complement of the original signal.
 When a signal has a maximum possible value, its complement is defined as
 the delta from the actual value and its possible maximum.
 Since the tunable implementation uses signals which have SCHED_LOAD_SCALE as
 the maximum possible value, the margin becomes:
 	margin := sched_cfs_boost * (SCHED_LOAD_SCALE - signal)
 Using this boosting strategy:
 - a 100% sched_cfs_boost means that the signal is scaled to the maximum value
 - each value in the range of sched_cfs_boost effectively inflates the signal in
  question by a quantity which is proportional to the maximum value.
 For example, by applying the SPC boosting strategy to the selection of the OPP
 to run a task it is possible to achieve these behaviors:
 -   0% boosting: run the task at the minimum OPP required by its workload
 - 100% boosting: run the task at the maximum OPP available for the CPU
 -  50% boosting: run at the half-way OPP between minimum and maximum
 Which means that, at 50% boosting, a task will be scheduled to run at half of
 the maximum theoretically achievable performance on the specific target
 platform.
 A graphical representation of an SPC boosted signal is represented in the
 following figure where:
 a) "-" represents the original signal
 b) "b" represents a  50% boosted signal
 c) "p" represents a 100% boosted signal
   ^
   |  SCHED_LOAD_SCALE
   +-----------------------------------------------------------------+
   |pppppppppppppppppppppppppppppppppppppppppppppppppppppppppppppppppp
   |
   |                                             boosted_signal
   |                                          bbbbbbbbbbbbbbbbbbbbbbbb
   |
   |                                            original signal
   |                  bbbbbbbbbbbbbbbbbbbbbbbb+----------------------+
   |                                          |
   |bbbbbbbbbbbbbbbbbb                        |
   |                                          |
   |                                          |
   |                                          |
   |                  +-----------------------+
   |                  |
   |                  |
   |                  |
   |------------------+
   |
   |
   +----------------------------------------------------------------------->
 The plot above shows a ramped load signal (titled 'original_signal') and it's
 boosted equivalent. For each step of the original signal the boosted signal
 corresponding to a 50% boost is midway from the original signal and the upper
 bound. Boosting by 100% generates a boosted signal which is always saturated to
 the upper bound.
 4. OPP selection using boosted CPU utilization
 ==============================================
 It is worth calling out that the implementation does not introduce any new load
 signals. Instead, it provides an API to tune existing signals. This tuning is
 done on demand and only in scheduler code paths where it is sensible to do so.
 The new API calls are defined to return either the default signal or a boosted
 one, depending on the value of sched_cfs_boost. This is a clean an non invasive
 modification of the existing existing code paths.
 The signal representing a CPU's utilization is boosted according to the
 previously described SPC boosting strategy. To sched-DVFS, this allows a CPU
 (ie CFS run-queue) to appear more used then it actually is.
 Thus, with the sched_cfs_boost enabled we have the following main functions to
 get the current utilization of a CPU:
  cpu_util()
  boosted_cpu_util()
 The new boosted_cpu_util() is similar to the first but returns a boosted
 utilization signal which is a function of the sched_cfs_boost value.
 This function is used in the CFS scheduler code paths where sched-DVFS needs to
 decide the OPP to run a CPU at.
 For example, this allows selecting the highest OPP for a CPU which has
 the boost value set to 100%.
 5. Per task group boosting
 ==========================
 On battery powered devices there usually are many background services which are
 long running and need energy efficient scheduling. On the other hand, some
 applications are more performance sensitive and require an interactive
 response and/or maximum performance, regardless of the energy cost.
 To better service such scenarios, the SchedTune implementation has an extension
 that provides a more fine grained boosting interface.
 A new CGroup controller, namely "schedtune", can be enabled which allows to
 defined and configure task groups with different boosting values.
 Tasks that require special performance can be put into separate CGroups.
 The value of the boost associated with the tasks in this group can be specified
 using a single knob exposed by the CGroup controller:
   schedtune.boost
 This knob allows the definition of a boost value that is to be used for
 SPC boosting of all tasks attached to this group.
 The current schedtune controller implementation is really simple and has these
 main characteristics:
  1) It is only possible to create 1 level depth hierarchies
     The root control groups define the system-wide boost value to be applied
     by default to all tasks. Its direct subgroups are named "boost groups" and
     they define the boost value for specific set of tasks.
     Further nested subgroups are not allowed since they do not have a sensible
     meaning from a user-space standpoint.
  2) It is possible to define only a limited number of "boost groups"
     This number is defined at compile time and by default configured to 16.
     This is a design decision motivated by two main reasons:
     a) In a real system we do not expect utilization scenarios with more then few
 	boost groups. For example, a reasonable collection of groups could be
        just "background", "interactive" and "performance".
     b) It simplifies the implementation considerably, especially for the code
 	which has to compute the per CPU boosting once there are multiple
        RUNNABLE tasks with different boost values.
 Such a simple design should allow servicing the main utilization scenarios identified
 so far. It provides a simple interface which can be used to manage the
 power-performance of all tasks or only selected tasks.
 Moreover, this interface can be easily integrated by user-space run-times (e.g.
 Android, ChromeOS) to implement a QoS solution for task boosting based on tasks
 classification, which has been a long standing requirement.
 Setup and usage
 ---------------
 0. Use a kernel with CONFIG_SCHED_TUNE support enabled
 1. Check that the "schedtune" CGroup controller is available:
   root@linaro-nano:~# cat /proc/cgroups
   #subsys_name	hierarchy	num_cgroups	enabled
   cpuset  	0		1		1
   cpu     	0		1		1
   schedtune	0		1		1
 2. Mount a tmpfs to create the CGroups mount point (Optional)
   root@linaro-nano:~# sudo mount -t tmpfs cgroups /sys/fs/cgroup
 3. Mount the "schedtune" controller
   root@linaro-nano:~# mkdir /sys/fs/cgroup/stune
   root@linaro-nano:~# sudo mount -t cgroup -o schedtune stune /sys/fs/cgroup/stune
 4. Create task groups and configure their specific boost value (Optional)
   For example here we create a "performance" boost group configure to boost
   all its tasks to 100%
   root@linaro-nano:~# mkdir /sys/fs/cgroup/stune/performance
   root@linaro-nano:~# echo 100 > /sys/fs/cgroup/stune/performance/schedtune.boost
 5. Move tasks into the boost group
   For example, the following moves the tasks with PID $TASKPID (and all its
   threads) into the "performance" boost group.
   root@linaro-nano:~# echo "TASKPID > /sys/fs/cgroup/stune/performance/cgroup.procs
 This simple configuration allows only the threads of the $TASKPID task to run,
 when needed, at the highest OPP in the most capable CPU of the system.
 6. Per-task wakeup-placement-strategy Selection
 ===============================================
 Many devices have a number of CFS tasks in use which require an absolute
 minimum wakeup latency, and many tasks for which wakeup latency is not
 important.
 For touch-driven environments, removing additional wakeup latency can be
 critical.
 When you use the Schedtume CGroup controller, you have access to a second
 parameter which allows a group to be marked such that energy_aware task
 placement is bypassed for tasks belonging to that group.
 prefer_idle=0 (default - use energy-aware task placement if available)
 prefer_idle=1 (never use energy-aware task placement for these tasks)
 Since the regular wakeup task placement algorithm in CFS is biased for
 performance, this has the effect of restoring minimum wakeup latency
 for the desired tasks whilst still allowing energy-aware wakeup placement
 to save energy for other tasks.
 7. Question and Answers
 =======================
 What about "auto" mode?
 -----------------------
 The 'auto' mode as described in [5] can be implemented by interfacing SchedTune
 with some suitable user-space element. This element could use the exposed
 system-wide or cgroup based interface.
 How are multiple groups of tasks with different boost values managed?
 ---------------------------------------------------------------------
 The current SchedTune implementation keeps track of the boosted RUNNABLE tasks
 on a CPU. The CPU utilization seen by the scheduler-driven cpufreq governors
 (and used to select an appropriate OPP) is boosted with a value which is the
 maximum of the boost values of the currently RUNNABLE tasks in its RQ.
 This allows cpufreq to boost a CPU only while there are boosted tasks ready
 to run and switch back to the energy efficient mode as soon as the last boosted
 task is dequeued.
 8. References
 =============
 [1] http://lwn.net/Articles/552889
 [2] http://lkml.org/lkml/2012/5/18/91
 [3] http://lkml.org/lkml/2015/6/26/620
--- a/Documentation/userspace-api/spec_ctrl.rst
+++ b/Documentation/userspace-api/spec_ctrl.rst
@@ -92,3 +92,12 @@ Speculation misfeature controls
   * prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_ENABLE, 0, 0);
   * prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_DISABLE, 0, 0);
   * prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_FORCE_DISABLE, 0, 0);
 - PR_SPEC_INDIR_BRANCH: Indirect Branch Speculation in User Processes
                        (Mitigate Spectre V2 style attacks against user processes)
  Invocations:
   * prctl(PR_GET_SPECULATION_CTRL, PR_SPEC_INDIRECT_BRANCH, 0, 0, 0);
   * prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_INDIRECT_BRANCH, PR_SPEC_ENABLE, 0, 0);
   * prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_INDIRECT_BRANCH, PR_SPEC_DISABLE, 0, 0);
   * prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_INDIRECT_BRANCH, PR_SPEC_FORCE_DISABLE, 0, 0);
--- a/Documentation/x86/x86_64/mm.txt
+++ b/Documentation/x86/x86_64/mm.txt
@@ -4,8 +4,9 @@ Virtual memory map with 4 level page tables:
 0000000000000000 - 00007fffffffffff (=47 bits) user space, different per mm
 hole caused by [47:63] sign extension
 ffff800000000000 - ffff87ffffffffff (=43 bits) guard hole, reserved for hypervisor
-ffff880000000000 - ffffc7ffffffffff (=64 TB) direct mapping of all phys. memory
+ffff880000000000 - ffff887fffffffff (=39 bits) LDT remap for PTI
-ffffc80000000000 - ffffc8ffffffffff (=40 bits) hole
+ffff888000000000 - ffffc87fffffffff (=64 TB) direct mapping of all phys. memory
 ffffc88000000000 - ffffc8ffffffffff (=39 bits) hole
 ffffc90000000000 - ffffe8ffffffffff (=45 bits) vmalloc/ioremap space
 ffffe90000000000 - ffffe9ffffffffff (=40 bits) hole
 ffffea0000000000 - ffffeaffffffffff (=40 bits) virtual memory map (1TB)
@@ -30,8 +31,9 @@ Virtual memory map with 5 level page tables:
 0000000000000000 - 00ffffffffffffff (=56 bits) user space, different per mm
 hole caused by [56:63] sign extension
 ff00000000000000 - ff0fffffffffffff (=52 bits) guard hole, reserved for hypervisor
-ff10000000000000 - ff8fffffffffffff (=55 bits) direct mapping of all phys. memory
+ff10000000000000 - ff10ffffffffffff (=48 bits) LDT remap for PTI
-ff90000000000000 - ff9fffffffffffff (=52 bits) LDT remap for PTI
+ff11000000000000 - ff90ffffffffffff (=55 bits) direct mapping of all phys. memory
 ff91000000000000 - ff9fffffffffffff (=3840 TB) hole
 ffa0000000000000 - ffd1ffffffffffff (=54 bits) vmalloc/ioremap space (12800 TB)
 ffd2000000000000 - ffd3ffffffffffff (=49 bits) hole
 ffd4000000000000 - ffd5ffffffffffff (=49 bits) virtual memory map (512TB)
--- a/1
+++ b/1
@@ -13777,6 +13777,7 @@ F:	drivers/i2c/busses/i2c-stm32*
 STABLE BRANCH
 M:	Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 M:	Sasha Levin <sashal@kernel.org>
 L:	stable@vger.kernel.org
 S:	Supported
 F:	Documentation/process/stable-kernel-rules.rst
--- a/18
+++ b/18
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 VERSION = 4
 PATCHLEVEL = 19
-SUBLEVEL = 4
+SUBLEVEL = 9
 EXTRAVERSION =
 NAME = "People's Front"
@@ -488,6 +488,9 @@ ifeq ($(cc-name),clang)
 ifneq ($(CROSS_COMPILE),)
 CLANG_TRIPLE	?= $(CROSS_COMPILE)
 CLANG_TARGET	:= --target=$(notdir $(CLANG_TRIPLE:%-=%))
 ifeq ($(shell $(srctree)/scripts/clang-android.sh $(CC) $(CLANG_TARGET)), y)
 $(error "Clang with Android --target detected. Did you specify CLANG_TRIPLE?")
 endif
 GCC_TOOLCHAIN_DIR := $(dir $(shell which $(LD)))
 CLANG_PREFIX	:= --prefix=$(GCC_TOOLCHAIN_DIR)
 GCC_TOOLCHAIN	:= $(realpath $(GCC_TOOLCHAIN_DIR)/..)
@@ -513,13 +516,6 @@ export RETPOLINE_VDSO_CFLAGS
 KBUILD_CFLAGS	+= $(call cc-option,-fno-PIE)
 KBUILD_AFLAGS	+= $(call cc-option,-fno-PIE)
 # check for 'asm goto'
 ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-goto.sh $(CC) $(KBUILD_CFLAGS)), y)
  CC_HAVE_ASM_GOTO := 1
  KBUILD_CFLAGS += -DCC_HAVE_ASM_GOTO
  KBUILD_AFLAGS += -DCC_HAVE_ASM_GOTO
 endif
 # The expansion should be delayed until arch/$(SRCARCH)/Makefile is included.
 # Some architectures define CROSS_COMPILE in arch/$(SRCARCH)/Makefile.
 # CC_VERSION_TEXT is referenced from Kconfig (so it needs export),
@@ -679,6 +675,12 @@ KBUILD_CFLAGS += $(call cc-ifversion, -lt, 0409, \
 # Tell gcc to never replace conditional load with a non-conditional one
 KBUILD_CFLAGS	+= $(call cc-option,--param=allow-store-data-races=0)
 # check for 'asm goto'
 ifeq ($(call shell-cached,$(CONFIG_SHELL) $(srctree)/scripts/gcc-goto.sh $(CC) $(KBUILD_CFLAGS)), y)
 	KBUILD_CFLAGS += -DCC_HAVE_ASM_GOTO
 	KBUILD_AFLAGS += -DCC_HAVE_ASM_GOTO
 endif
 include scripts/Makefile.kcov
 include scripts/Makefile.gcc-plugins
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -111,7 +111,7 @@ endmenu
 choice
 	prompt "ARC Instruction Set"
-	default ISA_ARCOMPACT
+	default ISA_ARCV2
 config ISA_ARCOMPACT
 	bool "ARCompact ISA"
--- a/arch/arc/Makefile
+++ b/arch/arc/Makefile
@@ -6,7 +6,7 @@
 # published by the Free Software Foundation.
 #
-KBUILD_DEFCONFIG := nsim_700_defconfig
+KBUILD_DEFCONFIG := nsim_hs_defconfig
 cflags-y	+= -fno-common -pipe -fno-builtin -mmedium-calls -D__linux__
 cflags-$(CONFIG_ISA_ARCOMPACT)	+= -mA7
--- a/arch/arc/configs/axs101_defconfig
+++ b/arch/arc/configs/axs101_defconfig
@@ -14,6 +14,7 @@ CONFIG_PERF_EVENTS=y
 # CONFIG_VM_EVENT_COUNTERS is not set
 # CONFIG_SLUB_DEBUG is not set
 # CONFIG_COMPAT_BRK is not set
 CONFIG_ISA_ARCOMPACT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_FORCE_LOAD=y
 CONFIG_MODULE_UNLOAD=y
@@ -95,6 +96,7 @@ CONFIG_VFAT_FS=y
 CONFIG_NTFS_FS=y
 CONFIG_TMPFS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
 # CONFIG_ENABLE_WARN_DEPRECATED is not set
--- a/arch/arc/configs/axs103_defconfig
+++ b/arch/arc/configs/axs103_defconfig
@@ -94,6 +94,7 @@ CONFIG_VFAT_FS=y
 CONFIG_NTFS_FS=y
 CONFIG_TMPFS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
 # CONFIG_ENABLE_WARN_DEPRECATED is not set
--- a/arch/arc/configs/axs103_smp_defconfig
+++ b/arch/arc/configs/axs103_smp_defconfig
@@ -97,6 +97,7 @@ CONFIG_VFAT_FS=y
 CONFIG_NTFS_FS=y
 CONFIG_TMPFS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
 # CONFIG_ENABLE_WARN_DEPRECATED is not set
--- a/arch/arc/configs/hsdk_defconfig
+++ b/arch/arc/configs/hsdk_defconfig
@@ -65,6 +65,7 @@ CONFIG_EXT3_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
 # CONFIG_ENABLE_WARN_DEPRECATED is not set
--- a/arch/arc/configs/nps_defconfig
+++ b/arch/arc/configs/nps_defconfig
@@ -15,6 +15,7 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_EMBEDDED=y
 CONFIG_PERF_EVENTS=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_ISA_ARCOMPACT=y
 CONFIG_KPROBES=y
 CONFIG_MODULES=y
 CONFIG_MODULE_FORCE_LOAD=y
@@ -73,6 +74,7 @@ CONFIG_PROC_KCORE=y
 CONFIG_TMPFS=y
 # CONFIG_MISC_FILESYSTEMS is not set
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_ROOT_NFS=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_ENABLE_WARN_DEPRECATED is not set
--- a/arch/arc/configs/nsim_700_defconfig
+++ b/arch/arc/configs/nsim_700_defconfig
@@ -15,6 +15,7 @@ CONFIG_EMBEDDED=y
 CONFIG_PERF_EVENTS=y
 # CONFIG_SLUB_DEBUG is not set
 # CONFIG_COMPAT_BRK is not set
 CONFIG_ISA_ARCOMPACT=y
 CONFIG_KPROBES=y
 CONFIG_MODULES=y
 # CONFIG_LBDAF is not set
--- a/arch/arc/configs/nsimosci_defconfig
+++ b/arch/arc/configs/nsimosci_defconfig
@@ -15,6 +15,7 @@ CONFIG_EMBEDDED=y
 CONFIG_PERF_EVENTS=y
 # CONFIG_SLUB_DEBUG is not set
 # CONFIG_COMPAT_BRK is not set
 CONFIG_ISA_ARCOMPACT=y
 CONFIG_KPROBES=y
 CONFIG_MODULES=y
 # CONFIG_LBDAF is not set
@@ -66,5 +67,6 @@ CONFIG_EXT2_FS_XATTR=y
 CONFIG_TMPFS=y
 # CONFIG_MISC_FILESYSTEMS is not set
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3_ACL=y
 # CONFIG_ENABLE_WARN_DEPRECATED is not set
 # CONFIG_ENABLE_MUST_CHECK is not set
--- a/arch/arc/configs/nsimosci_hs_defconfig
+++ b/arch/arc/configs/nsimosci_hs_defconfig
@@ -65,5 +65,6 @@ CONFIG_EXT2_FS_XATTR=y
 CONFIG_TMPFS=y
 # CONFIG_MISC_FILESYSTEMS is not set
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3_ACL=y
 # CONFIG_ENABLE_WARN_DEPRECATED is not set
 # CONFIG_ENABLE_MUST_CHECK is not set
--- a/arch/arc/configs/nsimosci_hs_smp_defconfig
+++ b/arch/arc/configs/nsimosci_hs_smp_defconfig
@@ -76,6 +76,7 @@ CONFIG_EXT2_FS_XATTR=y
 CONFIG_TMPFS=y
 # CONFIG_MISC_FILESYSTEMS is not set
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3_ACL=y
 # CONFIG_ENABLE_WARN_DEPRECATED is not set
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FTRACE=y
--- a/arch/arc/configs/tb10x_defconfig
+++ b/arch/arc/configs/tb10x_defconfig
@@ -19,6 +19,7 @@ CONFIG_KALLSYMS_ALL=y
 # CONFIG_AIO is not set
 CONFIG_EMBEDDED=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_ISA_ARCOMPACT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_FORCE_LOAD=y
--- a/arch/arc/configs/vdk_hs38_defconfig
+++ b/arch/arc/configs/vdk_hs38_defconfig
@@ -85,6 +85,7 @@ CONFIG_NTFS_FS=y
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
 # CONFIG_ENABLE_WARN_DEPRECATED is not set
--- a/arch/arc/configs/vdk_hs38_smp_defconfig
+++ b/arch/arc/configs/vdk_hs38_smp_defconfig
@@ -90,6 +90,7 @@ CONFIG_NTFS_FS=y
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
 # CONFIG_ENABLE_WARN_DEPRECATED is not set
--- a/arch/arm/boot/dts/imx53-ppd.dts
+++ b/arch/arm/boot/dts/imx53-ppd.dts
@@ -55,7 +55,7 @@
 	};
 	chosen {
-		stdout-path = "&uart1:115200n8";
+		stdout-path = "serial0:115200n8";
 	};
 	memory@70000000 {
--- a/arch/arm/boot/dts/imx6sll.dtsi
+++ b/arch/arm/boot/dts/imx6sll.dtsi
@@ -709,7 +709,7 @@
 			i2c1: i2c@21a0000 {
 				#address-cells = <1>;
 				#size-cells = <0>;
-				compatible = "fs,imx6sll-i2c", "fsl,imx21-i2c";
+				compatible = "fsl,imx6sll-i2c", "fsl,imx21-i2c";
 				reg = <0x021a0000 0x4000>;
 				interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clks IMX6SLL_CLK_I2C1>;
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -10,7 +10,11 @@
 #include "rk3288.dtsi"
 / {
-	memory@0 {
+	/*
 	 * The default coreboot on veyron devices ignores memory@0 nodes
 	 * and would instead create another memory node.
 	 */
 	memory {
 		device_type = "memory";
 		reg = <0x0 0x0 0x0 0x80000000>;
 	};
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -42,6 +42,7 @@
 			cci-control-port = <&cci_control1>;
 			cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <990>;
 		};
 		cpu1: cpu@1 {
@@ -51,6 +52,7 @@
 			cci-control-port = <&cci_control1>;
 			cpu-idle-states = <&CLUSTER_SLEEP_BIG>;
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <990>;
 		};
 		cpu2: cpu@2 {
@@ -60,6 +62,7 @@
 			cci-control-port = <&cci_control2>;
 			cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
 			capacity-dmips-mhz = <516>;
 			dynamic-power-coefficient = <133>;
 		};
 		cpu3: cpu@3 {
@@ -69,6 +72,7 @@
 			cci-control-port = <&cci_control2>;
 			cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
 			capacity-dmips-mhz = <516>;
 			dynamic-power-coefficient = <133>;
 		};
 		cpu4: cpu@4 {
@@ -78,6 +82,7 @@
 			cci-control-port = <&cci_control2>;
 			cpu-idle-states = <&CLUSTER_SLEEP_LITTLE>;
 			capacity-dmips-mhz = <516>;
 			dynamic-power-coefficient = <133>;
 		};
 		idle-states {
--- a/arch/arm/boot/dts/vf610m4-colibri.dts
+++ b/arch/arm/boot/dts/vf610m4-colibri.dts
@@ -50,8 +50,8 @@
 	compatible = "fsl,vf610m4";
 	chosen {
-		bootargs = "console=ttyLP2,115200 clk_ignore_unused init=/linuxrc rw";
+		bootargs = "clk_ignore_unused init=/linuxrc rw";
-		stdout-path = "&uart2";
+		stdout-path = "serial2:115200";
 	};
 	memory@8c000000 {
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -2,6 +2,12 @@ CONFIG_SYSVIPC=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_CGROUPS=y
 CONFIG_CGROUP_SCHED=y
 CONFIG_FAIR_GROUP_SCHED=y
 CONFIG_CGROUP_FREEZER=y
 CONFIG_CPUSETS=y
 CONFIG_PROC_PID_CPUSET=y
 CONFIG_SCHED_AUTOGROUP=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_EMBEDDED=y
 CONFIG_PERF_EVENTS=y
@@ -116,6 +122,7 @@ CONFIG_PCI_ENDPOINT=y
 CONFIG_PCI_ENDPOINT_CONFIGFS=y
 CONFIG_PCI_EPF_TEST=m
 CONFIG_SMP=y
 CONFIG_SCHED_MC=y
 CONFIG_NR_CPUS=16
 CONFIG_SECCOMP=y
 CONFIG_ARM_APPENDED_DTB=y
@@ -124,10 +131,10 @@ CONFIG_KEXEC=y
 CONFIG_EFI=y
 CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_STAT=y
-CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=m
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=m
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
 CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
 CONFIG_CPUFREQ_DT=y
 CONFIG_ARM_IMX6Q_CPUFREQ=y
@@ -137,6 +144,7 @@ CONFIG_ARM_CPUIDLE=y
 CONFIG_ARM_ZYNQ_CPUIDLE=y
 CONFIG_ARM_EXYNOS_CPUIDLE=y
 CONFIG_KERNEL_MODE_NEON=y
 CONFIG_ENERGY_MODEL=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
--- a/arch/arm/crypto/Kconfig
+++ b/arch/arm/crypto/Kconfig
@@ -69,6 +69,15 @@ config CRYPTO_AES_ARM
 	help
 	  Use optimized AES assembler routines for ARM platforms.
 	  On ARM processors without the Crypto Extensions, this is the
 	  fastest AES implementation for single blocks.  For multiple
 	  blocks, the NEON bit-sliced implementation is usually faster.
 	  This implementation may be vulnerable to cache timing attacks,
 	  since it uses lookup tables.  However, as countermeasures it
 	  disables IRQs and preloads the tables; it is hoped this makes
 	  such attacks very difficult.
 config CRYPTO_AES_ARM_BS
 	tristate "Bit sliced AES using NEON instructions"
 	depends on KERNEL_MODE_NEON
@@ -116,9 +125,14 @@ config CRYPTO_CRC32_ARM_CE
 	select CRYPTO_HASH
 config CRYPTO_CHACHA20_NEON
-	tristate "NEON accelerated ChaCha20 symmetric cipher"
+	tristate "NEON accelerated ChaCha stream cipher algorithms"
 	depends on KERNEL_MODE_NEON
 	select CRYPTO_BLKCIPHER
 	select CRYPTO_CHACHA20
 config CRYPTO_NHPOLY1305_NEON
 	tristate "NEON accelerated NHPoly1305 hash function (for Adiantum)"
 	depends on KERNEL_MODE_NEON
 	select CRYPTO_NHPOLY1305
 endif
--- a/arch/arm/crypto/Makefile
+++ b/arch/arm/crypto/Makefile
@@ -9,7 +9,8 @@ obj-$(CONFIG_CRYPTO_SHA1_ARM) += sha1-arm.o
 obj-$(CONFIG_CRYPTO_SHA1_ARM_NEON) += sha1-arm-neon.o
 obj-$(CONFIG_CRYPTO_SHA256_ARM) += sha256-arm.o
 obj-$(CONFIG_CRYPTO_SHA512_ARM) += sha512-arm.o
-obj-$(CONFIG_CRYPTO_CHACHA20_NEON) += chacha20-neon.o
+obj-$(CONFIG_CRYPTO_CHACHA20_NEON) += chacha-neon.o
 obj-$(CONFIG_CRYPTO_NHPOLY1305_NEON) += nhpoly1305-neon.o
 ce-obj-$(CONFIG_CRYPTO_AES_ARM_CE) += aes-arm-ce.o
 ce-obj-$(CONFIG_CRYPTO_SHA1_ARM_CE) += sha1-arm-ce.o
@@ -52,7 +53,8 @@ aes-arm-ce-y	:= aes-ce-core.o aes-ce-glue.o
 ghash-arm-ce-y	:= ghash-ce-core.o ghash-ce-glue.o
 crct10dif-arm-ce-y	:= crct10dif-ce-core.o crct10dif-ce-glue.o
 crc32-arm-ce-y:= crc32-ce-core.o crc32-ce-glue.o
-chacha20-neon-y := chacha20-neon-core.o chacha20-neon-glue.o
+chacha-neon-y := chacha-neon-core.o chacha-neon-glue.o
 nhpoly1305-neon-y := nh-neon-core.o nhpoly1305-neon-glue.o
 ifdef REGENERATE_ARM_CRYPTO
 quiet_cmd_perl = PERL    $@
--- a/arch/arm/crypto/aes-cipher-core.S
+++ b/arch/arm/crypto/aes-cipher-core.S
@@ -10,6 +10,7 @@
 */
 #include <linux/linkage.h>
 #include <asm/assembler.h>
 #include <asm/cache.h>
 	.text
@@ -41,7 +42,7 @@
 	.endif
 	.endm
-	.macro		__hround, out0, out1, in0, in1, in2, in3, t3, t4, enc, sz, op
+	.macro		__hround, out0, out1, in0, in1, in2, in3, t3, t4, enc, sz, op, oldcpsr
 	__select	\out0, \in0, 0
 	__select	t0, \in1, 1
 	__load		\out0, \out0, 0, \sz, \op
@@ -73,6 +74,14 @@
 	__load		t0, t0, 3, \sz, \op
 	__load		\t4, \t4, 3, \sz, \op
 	.ifnb		\oldcpsr
 	/*
 	 * This is the final round and we're done with all data-dependent table
 	 * lookups, so we can safely re-enable interrupts.
 	 */
 	restore_irqs	\oldcpsr
 	.endif
 	eor		\out1, \out1, t1, ror #24
 	eor		\out0, \out0, t2, ror #16
 	ldm		rk!, {t1, t2}
@@ -83,14 +92,14 @@
 	eor		\out1, \out1, t2
 	.endm
-	.macro		fround, out0, out1, out2, out3, in0, in1, in2, in3, sz=2, op
+	.macro		fround, out0, out1, out2, out3, in0, in1, in2, in3, sz=2, op, oldcpsr
 	__hround	\out0, \out1, \in0, \in1, \in2, \in3, \out2, \out3, 1, \sz, \op
-	__hround	\out2, \out3, \in2, \in3, \in0, \in1, \in1, \in2, 1, \sz, \op
+	__hround	\out2, \out3, \in2, \in3, \in0, \in1, \in1, \in2, 1, \sz, \op, \oldcpsr
 	.endm
-	.macro		iround, out0, out1, out2, out3, in0, in1, in2, in3, sz=2, op
+	.macro		iround, out0, out1, out2, out3, in0, in1, in2, in3, sz=2, op, oldcpsr
 	__hround	\out0, \out1, \in0, \in3, \in2, \in1, \out2, \out3, 0, \sz, \op
-	__hround	\out2, \out3, \in2, \in1, \in0, \in3, \in1, \in0, 0, \sz, \op
+	__hround	\out2, \out3, \in2, \in1, \in0, \in3, \in1, \in0, 0, \sz, \op, \oldcpsr
 	.endm
 	.macro		__rev, out, in
@@ -118,13 +127,14 @@
 	.macro		do_crypt, round, ttab, ltab, bsz
 	push		{r3-r11, lr}
 	// Load keys first, to reduce latency in case they're not cached yet.
 	ldm		rk!, {r8-r11}
 	ldr		r4, [in]
 	ldr		r5, [in, #4]
 	ldr		r6, [in, #8]
 	ldr		r7, [in, #12]
 	ldm		rk!, {r8-r11}
 #ifdef CONFIG_CPU_BIG_ENDIAN
 	__rev		r4, r4
 	__rev		r5, r5
@@ -138,6 +148,25 @@
 	eor		r7, r7, r11
 	__adrl		ttab, \ttab
 	/*
 	 * Disable interrupts and prefetch the 1024-byte 'ft' or 'it' table into
 	 * L1 cache, assuming cacheline size >= 32.  This is a hardening measure
 	 * intended to make cache-timing attacks more difficult.  They may not
 	 * be fully prevented, however; see the paper
 	 * https://cr.yp.to/antiforgery/cachetiming-20050414.pdf
 	 * ("Cache-timing attacks on AES") for a discussion of the many
 	 * difficulties involved in writing truly constant-time AES software.
 	 */
 	 save_and_disable_irqs	t0
 	.set		i, 0
 	.rept		1024 / 128
 	ldr		r8, [ttab, #i + 0]
 	ldr		r9, [ttab, #i + 32]
 	ldr		r10, [ttab, #i + 64]
 	ldr		r11, [ttab, #i + 96]
 	.set		i, i + 128
 	.endr
 	push		{t0}		// oldcpsr
 	tst		rounds, #2
 	bne		1f
@@ -151,8 +180,21 @@
 	\round		r4, r5, r6, r7, r8, r9, r10, r11
 	b		0b
-2:	__adrl		ttab, \ltab
+2:	.ifb		\ltab
-	\round		r4, r5, r6, r7, r8, r9, r10, r11, \bsz, b
+	add		ttab, ttab, #1
 	.else
 	__adrl		ttab, \ltab
 	// Prefetch inverse S-box for final round; see explanation above
 	.set		i, 0
 	.rept		256 / 64
 	ldr		t0, [ttab, #i + 0]
 	ldr		t1, [ttab, #i + 32]
 	.set		i, i + 64
 	.endr
 	.endif
 	pop		{rounds}	// oldcpsr
 	\round		r4, r5, r6, r7, r8, r9, r10, r11, \bsz, b, rounds
 #ifdef CONFIG_CPU_BIG_ENDIAN
 	__rev		r4, r4
@@ -175,7 +217,7 @@
 	.endm
 ENTRY(__aes_arm_encrypt)
-	do_crypt	fround, crypto_ft_tab, crypto_ft_tab + 1, 2
+	do_crypt	fround, crypto_ft_tab,, 2
 ENDPROC(__aes_arm_encrypt)
 	.align		5
--- a/arch/arm/crypto/chacha20-neon-core.S
+++ b/arch/arm/crypto/chacha20-neon-core.S
@@ -1,5 +1,5 @@
 /*
- * ChaCha20 256-bit cipher algorithm, RFC7539, ARM NEON functions
+ * ChaCha/XChaCha NEON helper functions
 *
 * Copyright (C) 2016 Linaro, Ltd. <ard.biesheuvel@linaro.org>
 *
@@ -18,35 +18,55 @@
 * (at your option) any later version.
 */
 /*
  * NEON doesn't have a rotate instruction.  The alternatives are, more or less:
  *
  * (a)  vshl.u32 + vsri.u32		(needs temporary register)
  * (b)  vshl.u32 + vshr.u32 + vorr	(needs temporary register)
  * (c)  vrev32.16			(16-bit rotations only)
  * (d)  vtbl.8 + vtbl.8		(multiple of 8 bits rotations only,
  *					 needs index vector)
  *
  * ChaCha has 16, 12, 8, and 7-bit rotations.  For the 12 and 7-bit rotations,
  * the only choices are (a) and (b).  We use (a) since it takes two-thirds the
  * cycles of (b) on both Cortex-A7 and Cortex-A53.
  *
  * For the 16-bit rotation, we use vrev32.16 since it's consistently fastest
  * and doesn't need a temporary register.
  *
  * For the 8-bit rotation, we use vtbl.8 + vtbl.8.  On Cortex-A7, this sequence
  * is twice as fast as (a), even when doing (a) on multiple registers
  * simultaneously to eliminate the stall between vshl and vsri.  Also, it
  * parallelizes better when temporary registers are scarce.
  *
  * A disadvantage is that on Cortex-A53, the vtbl sequence is the same speed as
  * (a), so the need to load the rotation table actually makes the vtbl method
  * slightly slower overall on that CPU (~1.3% slower ChaCha20).  Still, it
  * seems to be a good compromise to get a more significant speed boost on some
  * CPUs, e.g. ~4.8% faster ChaCha20 on Cortex-A7.
  */
 #include <linux/linkage.h>
 	.text
 	.fpu		neon
 	.align		5
-ENTRY(chacha20_block_xor_neon)
+/*
-	// r0: Input state matrix, s
+ * chacha_permute - permute one block
-	// r1: 1 data block output, o
+ *
-	// r2: 1 data block input, i
+ * Permute one 64-byte block where the state matrix is stored in the four NEON
 * registers q0-q3.  It performs matrix operations on four words in parallel,
 * but requires shuffling to rearrange the words after each round.
 *
 * The round count is given in r3.
 *
 * Clobbers: r3, ip, q4-q5
 */
 chacha_permute:
-	//
+	adr		ip, .Lrol8_table
-	// This function encrypts one ChaCha20 block by loading the state matrix
+	vld1.8		{d10}, [ip, :64]
 	// in four NEON registers. It performs matrix operation on four words in
 	// parallel, but requireds shuffling to rearrange the words after each
 	// round.
 	//
 	// x0..3 = s0..3
 	add		ip, r0, #0x20
 	vld1.32		{q0-q1}, [r0]
 	vld1.32		{q2-q3}, [ip]
 	vmov		q8, q0
 	vmov		q9, q1
 	vmov		q10, q2
 	vmov		q11, q3
 	mov		r3, #10
 .Ldoubleround:
 	// x0 += x1, x3 = rotl32(x3 ^ x0, 16)
@@ -62,9 +82,9 @@ ENTRY(chacha20_block_xor_neon)
 	// x0 += x1, x3 = rotl32(x3 ^ x0, 8)
 	vadd.i32	q0, q0, q1
-	veor		q4, q3, q0
+	veor		q3, q3, q0
-	vshl.u32	q3, q4, #8
+	vtbl.8		d6, {d6}, d10
-	vsri.u32	q3, q4, #24
+	vtbl.8		d7, {d7}, d10
 	// x2 += x3, x1 = rotl32(x1 ^ x2, 7)
 	vadd.i32	q2, q2, q3
@@ -92,9 +112,9 @@ ENTRY(chacha20_block_xor_neon)
 	// x0 += x1, x3 = rotl32(x3 ^ x0, 8)
 	vadd.i32	q0, q0, q1
-	veor		q4, q3, q0
+	veor		q3, q3, q0
-	vshl.u32	q3, q4, #8
+	vtbl.8		d6, {d6}, d10
-	vsri.u32	q3, q4, #24
+	vtbl.8		d7, {d7}, d10
 	// x2 += x3, x1 = rotl32(x1 ^ x2, 7)
 	vadd.i32	q2, q2, q3
@@ -109,9 +129,31 @@ ENTRY(chacha20_block_xor_neon)
 	// x3 = shuffle32(x3, MASK(0, 3, 2, 1))
 	vext.8		q3, q3, q3, #4
-	subs		r3, r3, #1
+	subs		r3, r3, #2
 	bne		.Ldoubleround
 	bx		lr
 ENDPROC(chacha_permute)
 ENTRY(chacha_block_xor_neon)
 	// r0: Input state matrix, s
 	// r1: 1 data block output, o
 	// r2: 1 data block input, i
 	// r3: nrounds
 	push		{lr}
 	// x0..3 = s0..3
 	add		ip, r0, #0x20
 	vld1.32		{q0-q1}, [r0]
 	vld1.32		{q2-q3}, [ip]
 	vmov		q8, q0
 	vmov		q9, q1
 	vmov		q10, q2
 	vmov		q11, q3
 	bl		chacha_permute
 	add		ip, r2, #0x20
 	vld1.8		{q4-q5}, [r2]
 	vld1.8		{q6-q7}, [ip]
@@ -136,44 +178,66 @@ ENTRY(chacha20_block_xor_neon)
 	vst1.8		{q0-q1}, [r1]
 	vst1.8		{q2-q3}, [ip]
-	bx		lr
+	pop		{pc}
-ENDPROC(chacha20_block_xor_neon)
+ENDPROC(chacha_block_xor_neon)
 ENTRY(hchacha_block_neon)
 	// r0: Input state matrix, s
 	// r1: output (8 32-bit words)
 	// r2: nrounds
 	push		{lr}
 	vld1.32		{q0-q1}, [r0]!
 	vld1.32		{q2-q3}, [r0]
 	mov		r3, r2
 	bl		chacha_permute
 	vst1.32		{q0}, [r1]!
 	vst1.32		{q3}, [r1]
 	pop		{pc}
 ENDPROC(hchacha_block_neon)
 	.align		4
 .Lctrinc:	.word	0, 1, 2, 3
 .Lrol8_table:	.byte	3, 0, 1, 2, 7, 4, 5, 6
 	.align		5
-ENTRY(chacha20_4block_xor_neon)
+ENTRY(chacha_4block_xor_neon)
-	push		{r4-r6, lr}
+	push		{r4-r5}
-	mov		ip, sp			// preserve the stack pointer
+	mov		r4, sp			// preserve the stack pointer
-	sub		r3, sp, #0x20		// allocate a 32 byte buffer
+	sub		ip, sp, #0x20		// allocate a 32 byte buffer
-	bic		r3, r3, #0x1f		// aligned to 32 bytes
+	bic		ip, ip, #0x1f		// aligned to 32 bytes
-	mov		sp, r3
+	mov		sp, ip
 	// r0: Input state matrix, s
 	// r1: 4 data blocks output, o
 	// r2: 4 data blocks input, i
 	// r3: nrounds
 	//
-	// This function encrypts four consecutive ChaCha20 blocks by loading
+	// This function encrypts four consecutive ChaCha blocks by loading
 	// the state matrix in NEON registers four times. The algorithm performs
 	// each operation on the corresponding word of each state matrix, hence
-	// requires no word shuffling. For final XORing step we transpose the
+	// requires no word shuffling. The words are re-interleaved before the
-	// matrix by interleaving 32- and then 64-bit words, which allows us to
+	// final addition of the original state and the XORing step.
 	// do XOR in NEON registers.
 	//
-	// x0..15[0-3] = s0..3[0..3]
+	// x0..15[0-3] = s0..15[0-3]
-	add		r3, r0, #0x20
+	add		ip, r0, #0x20
 	vld1.32		{q0-q1}, [r0]
-	vld1.32		{q2-q3}, [r3]
+	vld1.32		{q2-q3}, [ip]
-	adr		r3, CTRINC
+	adr		r5, .Lctrinc
 	vdup.32		q15, d7[1]
 	vdup.32		q14, d7[0]
-	vld1.32		{q11}, [r3, :128]
+	vld1.32		{q4}, [r5, :128]
 	vdup.32		q13, d6[1]
 	vdup.32		q12, d6[0]
 	vadd.i32	q12, q12, q11		// x12 += counter values 0-3
 	vdup.32		q11, d5[1]
 	vdup.32		q10, d5[0]
 	vadd.u32	q12, q12, q4		// x12 += counter values 0-3
 	vdup.32		q9, d4[1]
 	vdup.32		q8, d4[0]
 	vdup.32		q7, d3[1]
@@ -185,9 +249,12 @@ ENTRY(chacha20_4block_xor_neon)
 	vdup.32		q1, d0[1]
 	vdup.32		q0, d0[0]
-	mov		r3, #10
+	adr		ip, .Lrol8_table
 	b		1f
 .Ldoubleround4:
 	vld1.32		{q8-q9}, [sp, :256]
 1:
 	// x0 += x4, x12 = rotl32(x12 ^ x0, 16)
 	// x1 += x5, x13 = rotl32(x13 ^ x1, 16)
 	// x2 += x6, x14 = rotl32(x14 ^ x2, 16)
@@ -236,24 +303,25 @@ ENTRY(chacha20_4block_xor_neon)
 	// x1 += x5, x13 = rotl32(x13 ^ x1, 8)
 	// x2 += x6, x14 = rotl32(x14 ^ x2, 8)
 	// x3 += x7, x15 = rotl32(x15 ^ x3, 8)
 	vld1.8		{d16}, [ip, :64]
 	vadd.i32	q0, q0, q4
 	vadd.i32	q1, q1, q5
 	vadd.i32	q2, q2, q6
 	vadd.i32	q3, q3, q7
-	veor		q8, q12, q0
+	veor		q12, q12, q0
-	veor		q9, q13, q1
+	veor		q13, q13, q1
-	vshl.u32	q12, q8, #8
+	veor		q14, q14, q2
-	vshl.u32	q13, q9, #8
+	veor		q15, q15, q3
 	vsri.u32	q12, q8, #24
 	vsri.u32	q13, q9, #24
-	veor		q8, q14, q2
+	vtbl.8		d24, {d24}, d16
-	veor		q9, q15, q3
+	vtbl.8		d25, {d25}, d16
-	vshl.u32	q14, q8, #8
+	vtbl.8		d26, {d26}, d16
-	vshl.u32	q15, q9, #8
+	vtbl.8		d27, {d27}, d16
-	vsri.u32	q14, q8, #24
+	vtbl.8		d28, {d28}, d16
-	vsri.u32	q15, q9, #24
+	vtbl.8		d29, {d29}, d16
 	vtbl.8		d30, {d30}, d16
 	vtbl.8		d31, {d31}, d16
 	vld1.32		{q8-q9}, [sp, :256]
@@ -332,24 +400,25 @@ ENTRY(chacha20_4block_xor_neon)
 	// x1 += x6, x12 = rotl32(x12 ^ x1, 8)
 	// x2 += x7, x13 = rotl32(x13 ^ x2, 8)
 	// x3 += x4, x14 = rotl32(x14 ^ x3, 8)
 	vld1.8		{d16}, [ip, :64]
 	vadd.i32	q0, q0, q5
 	vadd.i32	q1, q1, q6
 	vadd.i32	q2, q2, q7
 	vadd.i32	q3, q3, q4
-	veor		q8, q15, q0
+	veor		q15, q15, q0
-	veor		q9, q12, q1
+	veor		q12, q12, q1
-	vshl.u32	q15, q8, #8
+	veor		q13, q13, q2
-	vshl.u32	q12, q9, #8
+	veor		q14, q14, q3
 	vsri.u32	q15, q8, #24
 	vsri.u32	q12, q9, #24
-	veor		q8, q13, q2
+	vtbl.8		d30, {d30}, d16
-	veor		q9, q14, q3
+	vtbl.8		d31, {d31}, d16
-	vshl.u32	q13, q8, #8
+	vtbl.8		d24, {d24}, d16
-	vshl.u32	q14, q9, #8
+	vtbl.8		d25, {d25}, d16
-	vsri.u32	q13, q8, #24
+	vtbl.8		d26, {d26}, d16
-	vsri.u32	q14, q9, #24
+	vtbl.8		d27, {d27}, d16
 	vtbl.8		d28, {d28}, d16
 	vtbl.8		d29, {d29}, d16
 	vld1.32		{q8-q9}, [sp, :256]
@@ -378,105 +447,77 @@ ENTRY(chacha20_4block_xor_neon)
 	vsri.u32	q5, q8, #25
 	vsri.u32	q6, q9, #25
-	subs		r3, r3, #1
+	subs		r3, r3, #2
-	beq		0f
+	bne		.Ldoubleround4
-	vld1.32		{q8-q9}, [sp, :256]
+	// x0..7[0-3] are in q0-q7, x10..15[0-3] are in q10-q15.
-	b		.Ldoubleround4
+	// x8..9[0-3] are on the stack.
-	// x0[0-3] += s0[0]
+	// Re-interleave the words in the first two rows of each block (x0..7).
-	// x1[0-3] += s0[1]
+	// Also add the counter values 0-3 to x12[0-3].
-	// x2[0-3] += s0[2]
+	  vld1.32	{q8}, [r5, :128]	// load counter values 0-3
-	// x3[0-3] += s0[3]
+	vzip.32		q0, q1			// => (0 1 0 1) (0 1 0 1)
-0:	ldmia		r0!, {r3-r6}
+	vzip.32		q2, q3			// => (2 3 2 3) (2 3 2 3)
-	vdup.32		q8, r3
+	vzip.32		q4, q5			// => (4 5 4 5) (4 5 4 5)
-	vdup.32		q9, r4
+	vzip.32		q6, q7			// => (6 7 6 7) (6 7 6 7)
-	vadd.i32	q0, q0, q8
+	  vadd.u32	q12, q8			// x12 += counter values 0-3
 	vadd.i32	q1, q1, q9
 	vdup.32		q8, r5
 	vdup.32		q9, r6
 	vadd.i32	q2, q2, q8
 	vadd.i32	q3, q3, q9
 	// x4[0-3] += s1[0]
 	// x5[0-3] += s1[1]
 	// x6[0-3] += s1[2]
 	// x7[0-3] += s1[3]
 	ldmia		r0!, {r3-r6}
 	vdup.32		q8, r3
 	vdup.32		q9, r4
 	vadd.i32	q4, q4, q8
 	vadd.i32	q5, q5, q9
 	vdup.32		q8, r5
 	vdup.32		q9, r6
 	vadd.i32	q6, q6, q8
 	vadd.i32	q7, q7, q9
 	// interleave 32-bit words in state n, n+1
 	vzip.32		q0, q1
 	vzip.32		q2, q3
 	vzip.32		q4, q5
 	vzip.32		q6, q7
 	// interleave 64-bit words in state n, n+2
 	vswp		d1, d4
 	vswp		d3, d6
 	  vld1.32	{q8-q9}, [r0]!		// load s0..7
 	vswp		d9, d12
 	vswp		d11, d14
-	// xor with corresponding input, write to output
+	// Swap q1 and q4 so that we'll free up consecutive registers (q0-q1)
 	// after XORing the first 32 bytes.
 	vswp		q1, q4
 	// First two rows of each block are (q0 q1) (q2 q6) (q4 q5) (q3 q7)
 	// x0..3[0-3] += s0..3[0-3]	(add orig state to 1st row of each block)
 	vadd.u32	q0, q0, q8
 	vadd.u32	q2, q2, q8
 	vadd.u32	q4, q4, q8
 	vadd.u32	q3, q3, q8
 	// x4..7[0-3] += s4..7[0-3]	(add orig state to 2nd row of each block)
 	vadd.u32	q1, q1, q9
 	vadd.u32	q6, q6, q9
 	vadd.u32	q5, q5, q9
 	vadd.u32	q7, q7, q9
 	// XOR first 32 bytes using keystream from first two rows of first block
 	vld1.8		{q8-q9}, [r2]!
 	veor		q8, q8, q0
-	veor		q9, q9, q4
+	veor		q9, q9, q1
 	vst1.8		{q8-q9}, [r1]!
 	// Re-interleave the words in the last two rows of each block (x8..15).
 	vld1.32		{q8-q9}, [sp, :256]
-
+	vzip.32		q12, q13	// => (12 13 12 13) (12 13 12 13)
-	// x8[0-3] += s2[0]
+	vzip.32		q14, q15	// => (14 15 14 15) (14 15 14 15)
-	// x9[0-3] += s2[1]
+	vzip.32		q8, q9		// => (8 9 8 9) (8 9 8 9)
-	// x10[0-3] += s2[2]
+	vzip.32		q10, q11	// => (10 11 10 11) (10 11 10 11)
-	// x11[0-3] += s2[3]
+	  vld1.32	{q0-q1}, [r0]	// load s8..15
 	ldmia		r0!, {r3-r6}
 	vdup.32		q0, r3
 	vdup.32		q4, r4
 	vadd.i32	q8, q8, q0
 	vadd.i32	q9, q9, q4
 	vdup.32		q0, r5
 	vdup.32		q4, r6
 	vadd.i32	q10, q10, q0
 	vadd.i32	q11, q11, q4
 	// x12[0-3] += s3[0]
 	// x13[0-3] += s3[1]
 	// x14[0-3] += s3[2]
 	// x15[0-3] += s3[3]
 	ldmia		r0!, {r3-r6}
 	vdup.32		q0, r3
 	vdup.32		q4, r4
 	adr		r3, CTRINC
 	vadd.i32	q12, q12, q0
 	vld1.32		{q0}, [r3, :128]
 	vadd.i32	q13, q13, q4
 	vadd.i32	q12, q12, q0		// x12 += counter values 0-3
 	vdup.32		q0, r5
 	vdup.32		q4, r6
 	vadd.i32	q14, q14, q0
 	vadd.i32	q15, q15, q4
 	// interleave 32-bit words in state n, n+1
 	vzip.32		q8, q9
 	vzip.32		q10, q11
 	vzip.32		q12, q13
 	vzip.32		q14, q15
 	// interleave 64-bit words in state n, n+2
 	vswp		d17, d20
 	vswp		d19, d22
 	vswp		d25, d28
 	vswp		d27, d30
 	vswp		d17, d20
 	vswp		d19, d22
-	vmov		q4, q1
+	// Last two rows of each block are (q8 q12) (q10 q14) (q9 q13) (q11 q15)
 	// x8..11[0-3] += s8..11[0-3]	(add orig state to 3rd row of each block)
 	vadd.u32	q8,  q8,  q0
 	vadd.u32	q10, q10, q0
 	vadd.u32	q9,  q9,  q0
 	vadd.u32	q11, q11, q0
 	// x12..15[0-3] += s12..15[0-3] (add orig state to 4th row of each block)
 	vadd.u32	q12, q12, q1
 	vadd.u32	q14, q14, q1
 	vadd.u32	q13, q13, q1
 	vadd.u32	q15, q15, q1
 	// XOR the rest of the data with the keystream
 	vld1.8		{q0-q1}, [r2]!
 	veor		q0, q0, q8
@@ -509,13 +550,11 @@ ENTRY(chacha20_4block_xor_neon)
 	vst1.8		{q0-q1}, [r1]!
 	vld1.8		{q0-q1}, [r2]
 	  mov		sp, r4		// restore original stack pointer
 	veor		q0, q0, q11
 	veor		q1, q1, q15
 	vst1.8		{q0-q1}, [r1]
-	mov		sp, ip
+	pop		{r4-r5}
-	pop		{r4-r6, pc}
+	bx		lr
-ENDPROC(chacha20_4block_xor_neon)
+ENDPROC(chacha_4block_xor_neon)
 	.align		4
 CTRINC:	.word		0, 1, 2, 3
--- a/arch/arm/crypto/chacha-neon-glue.c
+++ b/arch/arm/crypto/chacha-neon-glue.c
@@ -0,0 +1,201 @@
 /*
 * ARM NEON accelerated ChaCha and XChaCha stream ciphers,
 * including ChaCha20 (RFC7539)
 *
 * Copyright (C) 2016 Linaro, Ltd. <ard.biesheuvel@linaro.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Based on:
 * ChaCha20 256-bit cipher algorithm, RFC7539, SIMD glue code
 *
 * Copyright (C) 2015 Martin Willi
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */
 #include <crypto/algapi.h>
 #include <crypto/chacha.h>
 #include <crypto/internal/skcipher.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <asm/hwcap.h>
 #include <asm/neon.h>
 #include <asm/simd.h>
 asmlinkage void chacha_block_xor_neon(const u32 *state, u8 *dst, const u8 *src,
 				      int nrounds);
 asmlinkage void chacha_4block_xor_neon(const u32 *state, u8 *dst, const u8 *src,
 				       int nrounds);
 asmlinkage void hchacha_block_neon(const u32 *state, u32 *out, int nrounds);
 static void chacha_doneon(u32 *state, u8 *dst, const u8 *src,
 			  unsigned int bytes, int nrounds)
 {
 	u8 buf[CHACHA_BLOCK_SIZE];
 	while (bytes >= CHACHA_BLOCK_SIZE * 4) {
 		chacha_4block_xor_neon(state, dst, src, nrounds);
 		bytes -= CHACHA_BLOCK_SIZE * 4;
 		src += CHACHA_BLOCK_SIZE * 4;
 		dst += CHACHA_BLOCK_SIZE * 4;
 		state[12] += 4;
 	}
 	while (bytes >= CHACHA_BLOCK_SIZE) {
 		chacha_block_xor_neon(state, dst, src, nrounds);
 		bytes -= CHACHA_BLOCK_SIZE;
 		src += CHACHA_BLOCK_SIZE;
 		dst += CHACHA_BLOCK_SIZE;
 		state[12]++;
 	}
 	if (bytes) {
 		memcpy(buf, src, bytes);
 		chacha_block_xor_neon(state, buf, buf, nrounds);
 		memcpy(dst, buf, bytes);
 	}
 }
 static int chacha_neon_stream_xor(struct skcipher_request *req,
 				  struct chacha_ctx *ctx, u8 *iv)
 {
 	struct skcipher_walk walk;
 	u32 state[16];
 	int err;
 	err = skcipher_walk_virt(&walk, req, false);
 	crypto_chacha_init(state, ctx, iv);
 	while (walk.nbytes > 0) {
 		unsigned int nbytes = walk.nbytes;
 		if (nbytes < walk.total)
 			nbytes = round_down(nbytes, walk.stride);
 		kernel_neon_begin();
 		chacha_doneon(state, walk.dst.virt.addr, walk.src.virt.addr,
 			      nbytes, ctx->nrounds);
 		kernel_neon_end();
 		err = skcipher_walk_done(&walk, walk.nbytes - nbytes);
 	}
 	return err;
 }
 static int chacha_neon(struct skcipher_request *req)
 {
 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
 	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
 	if (req->cryptlen <= CHACHA_BLOCK_SIZE || !may_use_simd())
 		return crypto_chacha_crypt(req);
 	return chacha_neon_stream_xor(req, ctx, req->iv);
 }
 static int xchacha_neon(struct skcipher_request *req)
 {
 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
 	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
 	struct chacha_ctx subctx;
 	u32 state[16];
 	u8 real_iv[16];
 	if (req->cryptlen <= CHACHA_BLOCK_SIZE || !may_use_simd())
 		return crypto_xchacha_crypt(req);
 	crypto_chacha_init(state, ctx, req->iv);
 	kernel_neon_begin();
 	hchacha_block_neon(state, subctx.key, ctx->nrounds);
 	kernel_neon_end();
 	subctx.nrounds = ctx->nrounds;
 	memcpy(&real_iv[0], req->iv + 24, 8);
 	memcpy(&real_iv[8], req->iv + 16, 8);
 	return chacha_neon_stream_xor(req, &subctx, real_iv);
 }
 static struct skcipher_alg algs[] = {
 	{
 		.base.cra_name		= "chacha20",
 		.base.cra_driver_name	= "chacha20-neon",
 		.base.cra_priority	= 300,
 		.base.cra_blocksize	= 1,
 		.base.cra_ctxsize	= sizeof(struct chacha_ctx),
 		.base.cra_module	= THIS_MODULE,
 		.min_keysize		= CHACHA_KEY_SIZE,
 		.max_keysize		= CHACHA_KEY_SIZE,
 		.ivsize			= CHACHA_IV_SIZE,
 		.chunksize		= CHACHA_BLOCK_SIZE,
 		.walksize		= 4 * CHACHA_BLOCK_SIZE,
 		.setkey			= crypto_chacha20_setkey,
 		.encrypt		= chacha_neon,
 		.decrypt		= chacha_neon,
 	}, {
 		.base.cra_name		= "xchacha20",
 		.base.cra_driver_name	= "xchacha20-neon",
 		.base.cra_priority	= 300,
 		.base.cra_blocksize	= 1,
 		.base.cra_ctxsize	= sizeof(struct chacha_ctx),
 		.base.cra_module	= THIS_MODULE,
 		.min_keysize		= CHACHA_KEY_SIZE,
 		.max_keysize		= CHACHA_KEY_SIZE,
 		.ivsize			= XCHACHA_IV_SIZE,
 		.chunksize		= CHACHA_BLOCK_SIZE,
 		.walksize		= 4 * CHACHA_BLOCK_SIZE,
 		.setkey			= crypto_chacha20_setkey,
 		.encrypt		= xchacha_neon,
 		.decrypt		= xchacha_neon,
 	}, {
 		.base.cra_name		= "xchacha12",
 		.base.cra_driver_name	= "xchacha12-neon",
 		.base.cra_priority	= 300,
 		.base.cra_blocksize	= 1,
 		.base.cra_ctxsize	= sizeof(struct chacha_ctx),
 		.base.cra_module	= THIS_MODULE,
 		.min_keysize		= CHACHA_KEY_SIZE,
 		.max_keysize		= CHACHA_KEY_SIZE,
 		.ivsize			= XCHACHA_IV_SIZE,
 		.chunksize		= CHACHA_BLOCK_SIZE,
 		.walksize		= 4 * CHACHA_BLOCK_SIZE,
 		.setkey			= crypto_chacha12_setkey,
 		.encrypt		= xchacha_neon,
 		.decrypt		= xchacha_neon,
 	}
 };
 static int __init chacha_simd_mod_init(void)
 {
 	if (!(elf_hwcap & HWCAP_NEON))
 		return -ENODEV;
 	return crypto_register_skciphers(algs, ARRAY_SIZE(algs));
 }
 static void __exit chacha_simd_mod_fini(void)
 {
 	crypto_unregister_skciphers(algs, ARRAY_SIZE(algs));
 }
 module_init(chacha_simd_mod_init);
 module_exit(chacha_simd_mod_fini);
 MODULE_DESCRIPTION("ChaCha and XChaCha stream ciphers (NEON accelerated)");
 MODULE_AUTHOR("Ard Biesheuvel <ard.biesheuvel@linaro.org>");
 MODULE_LICENSE("GPL v2");
 MODULE_ALIAS_CRYPTO("chacha20");
 MODULE_ALIAS_CRYPTO("chacha20-neon");
 MODULE_ALIAS_CRYPTO("xchacha20");
 MODULE_ALIAS_CRYPTO("xchacha20-neon");
 MODULE_ALIAS_CRYPTO("xchacha12");
 MODULE_ALIAS_CRYPTO("xchacha12-neon");
--- a/arch/arm/crypto/chacha20-neon-glue.c
+++ b/arch/arm/crypto/chacha20-neon-glue.c
@@ -1,127 +0,0 @@
 /*
 * ChaCha20 256-bit cipher algorithm, RFC7539, ARM NEON functions
 *
 * Copyright (C) 2016 Linaro, Ltd. <ard.biesheuvel@linaro.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Based on:
 * ChaCha20 256-bit cipher algorithm, RFC7539, SIMD glue code
 *
 * Copyright (C) 2015 Martin Willi
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */
 #include <crypto/algapi.h>
 #include <crypto/chacha20.h>
 #include <crypto/internal/skcipher.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <asm/hwcap.h>
 #include <asm/neon.h>
 #include <asm/simd.h>
 asmlinkage void chacha20_block_xor_neon(u32 *state, u8 *dst, const u8 *src);
 asmlinkage void chacha20_4block_xor_neon(u32 *state, u8 *dst, const u8 *src);
 static void chacha20_doneon(u32 *state, u8 *dst, const u8 *src,
 			    unsigned int bytes)
 {
 	u8 buf[CHACHA20_BLOCK_SIZE];
 	while (bytes >= CHACHA20_BLOCK_SIZE * 4) {
 		chacha20_4block_xor_neon(state, dst, src);
 		bytes -= CHACHA20_BLOCK_SIZE * 4;
 		src += CHACHA20_BLOCK_SIZE * 4;
 		dst += CHACHA20_BLOCK_SIZE * 4;
 		state[12] += 4;
 	}
 	while (bytes >= CHACHA20_BLOCK_SIZE) {
 		chacha20_block_xor_neon(state, dst, src);
 		bytes -= CHACHA20_BLOCK_SIZE;
 		src += CHACHA20_BLOCK_SIZE;
 		dst += CHACHA20_BLOCK_SIZE;
 		state[12]++;
 	}
 	if (bytes) {
 		memcpy(buf, src, bytes);
 		chacha20_block_xor_neon(state, buf, buf);
 		memcpy(dst, buf, bytes);
 	}
 }
 static int chacha20_neon(struct skcipher_request *req)
 {
 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
 	struct chacha20_ctx *ctx = crypto_skcipher_ctx(tfm);
 	struct skcipher_walk walk;
 	u32 state[16];
 	int err;
 	if (req->cryptlen <= CHACHA20_BLOCK_SIZE || !may_use_simd())
 		return crypto_chacha20_crypt(req);
 	err = skcipher_walk_virt(&walk, req, true);
 	crypto_chacha20_init(state, ctx, walk.iv);
 	kernel_neon_begin();
 	while (walk.nbytes > 0) {
 		unsigned int nbytes = walk.nbytes;
 		if (nbytes < walk.total)
 			nbytes = round_down(nbytes, walk.stride);
 		chacha20_doneon(state, walk.dst.virt.addr, walk.src.virt.addr,
 				nbytes);
 		err = skcipher_walk_done(&walk, walk.nbytes - nbytes);
 	}
 	kernel_neon_end();
 	return err;
 }
 static struct skcipher_alg alg = {
 	.base.cra_name		= "chacha20",
 	.base.cra_driver_name	= "chacha20-neon",
 	.base.cra_priority	= 300,
 	.base.cra_blocksize	= 1,
 	.base.cra_ctxsize	= sizeof(struct chacha20_ctx),
 	.base.cra_module	= THIS_MODULE,
 	.min_keysize		= CHACHA20_KEY_SIZE,
 	.max_keysize		= CHACHA20_KEY_SIZE,
 	.ivsize			= CHACHA20_IV_SIZE,
 	.chunksize		= CHACHA20_BLOCK_SIZE,
 	.walksize		= 4 * CHACHA20_BLOCK_SIZE,
 	.setkey			= crypto_chacha20_setkey,
 	.encrypt		= chacha20_neon,
 	.decrypt		= chacha20_neon,
 };
 static int __init chacha20_simd_mod_init(void)
 {
 	if (!(elf_hwcap & HWCAP_NEON))
 		return -ENODEV;
 	return crypto_register_skcipher(&alg);
 }
 static void __exit chacha20_simd_mod_fini(void)
 {
 	crypto_unregister_skcipher(&alg);
 }
 module_init(chacha20_simd_mod_init);
 module_exit(chacha20_simd_mod_fini);
 MODULE_AUTHOR("Ard Biesheuvel <ard.biesheuvel@linaro.org>");
 MODULE_LICENSE("GPL v2");
 MODULE_ALIAS_CRYPTO("chacha20");
--- a/arch/arm/crypto/nh-neon-core.S
+++ b/arch/arm/crypto/nh-neon-core.S
@@ -0,0 +1,116 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
 * NH - ε-almost-universal hash function, NEON accelerated version
 *
 * Copyright 2018 Google LLC
 *
 * Author: Eric Biggers <ebiggers@google.com>
 */
 #include <linux/linkage.h>
 	.text
 	.fpu		neon
 	KEY		.req	r0
 	MESSAGE		.req	r1
 	MESSAGE_LEN	.req	r2
 	HASH		.req	r3
 	PASS0_SUMS	.req	q0
 	PASS0_SUM_A	.req	d0
 	PASS0_SUM_B	.req	d1
 	PASS1_SUMS	.req	q1
 	PASS1_SUM_A	.req	d2
 	PASS1_SUM_B	.req	d3
 	PASS2_SUMS	.req	q2
 	PASS2_SUM_A	.req	d4
 	PASS2_SUM_B	.req	d5
 	PASS3_SUMS	.req	q3
 	PASS3_SUM_A	.req	d6
 	PASS3_SUM_B	.req	d7
 	K0		.req	q4
 	K1		.req	q5
 	K2		.req	q6
 	K3		.req	q7
 	T0		.req	q8
 	T0_L		.req	d16
 	T0_H		.req	d17
 	T1		.req	q9
 	T1_L		.req	d18
 	T1_H		.req	d19
 	T2		.req	q10
 	T2_L		.req	d20
 	T2_H		.req	d21
 	T3		.req	q11
 	T3_L		.req	d22
 	T3_H		.req	d23
 .macro _nh_stride	k0, k1, k2, k3
 	// Load next message stride
 	vld1.8		{T3}, [MESSAGE]!
 	// Load next key stride
 	vld1.32		{\k3}, [KEY]!
 	// Add message words to key words
 	vadd.u32	T0, T3, \k0
 	vadd.u32	T1, T3, \k1
 	vadd.u32	T2, T3, \k2
 	vadd.u32	T3, T3, \k3
 	// Multiply 32x32 => 64 and accumulate
 	vmlal.u32	PASS0_SUMS, T0_L, T0_H
 	vmlal.u32	PASS1_SUMS, T1_L, T1_H
 	vmlal.u32	PASS2_SUMS, T2_L, T2_H
 	vmlal.u32	PASS3_SUMS, T3_L, T3_H
 .endm
 /*
 * void nh_neon(const u32 *key, const u8 *message, size_t message_len,
 *		u8 hash[NH_HASH_BYTES])
 *
 * It's guaranteed that message_len % 16 == 0.
 */
 ENTRY(nh_neon)
 	vld1.32		{K0,K1}, [KEY]!
 	  vmov.u64	PASS0_SUMS, #0
 	  vmov.u64	PASS1_SUMS, #0
 	vld1.32		{K2}, [KEY]!
 	  vmov.u64	PASS2_SUMS, #0
 	  vmov.u64	PASS3_SUMS, #0
 	subs		MESSAGE_LEN, MESSAGE_LEN, #64
 	blt		.Lloop4_done
 .Lloop4:
 	_nh_stride	K0, K1, K2, K3
 	_nh_stride	K1, K2, K3, K0
 	_nh_stride	K2, K3, K0, K1
 	_nh_stride	K3, K0, K1, K2
 	subs		MESSAGE_LEN, MESSAGE_LEN, #64
 	bge		.Lloop4
 .Lloop4_done:
 	ands		MESSAGE_LEN, MESSAGE_LEN, #63
 	beq		.Ldone
 	_nh_stride	K0, K1, K2, K3
 	subs		MESSAGE_LEN, MESSAGE_LEN, #16
 	beq		.Ldone
 	_nh_stride	K1, K2, K3, K0
 	subs		MESSAGE_LEN, MESSAGE_LEN, #16
 	beq		.Ldone
 	_nh_stride	K2, K3, K0, K1
 .Ldone:
 	// Sum the accumulators for each pass, then store the sums to 'hash'
 	vadd.u64	T0_L, PASS0_SUM_A, PASS0_SUM_B
 	vadd.u64	T0_H, PASS1_SUM_A, PASS1_SUM_B
 	vadd.u64	T1_L, PASS2_SUM_A, PASS2_SUM_B
 	vadd.u64	T1_H, PASS3_SUM_A, PASS3_SUM_B
 	vst1.8		{T0-T1}, [HASH]
 	bx		lr
 ENDPROC(nh_neon)
--- a/arch/arm/crypto/nhpoly1305-neon-glue.c
+++ b/arch/arm/crypto/nhpoly1305-neon-glue.c
@@ -0,0 +1,77 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
 * NHPoly1305 - ε-almost-∆-universal hash function for Adiantum
 * (NEON accelerated version)
 *
 * Copyright 2018 Google LLC
 */
 #include <asm/neon.h>
 #include <asm/simd.h>
 #include <crypto/internal/hash.h>
 #include <crypto/nhpoly1305.h>
 #include <linux/module.h>
 asmlinkage void nh_neon(const u32 *key, const u8 *message, size_t message_len,
 			u8 hash[NH_HASH_BYTES]);
 /* wrapper to avoid indirect call to assembly, which doesn't work with CFI */
 static void _nh_neon(const u32 *key, const u8 *message, size_t message_len,
 		     __le64 hash[NH_NUM_PASSES])
 {
 	nh_neon(key, message, message_len, (u8 *)hash);
 }
 static int nhpoly1305_neon_update(struct shash_desc *desc,
 				  const u8 *src, unsigned int srclen)
 {
 	if (srclen < 64 || !may_use_simd())
 		return crypto_nhpoly1305_update(desc, src, srclen);
 	do {
 		unsigned int n = min_t(unsigned int, srclen, PAGE_SIZE);
 		kernel_neon_begin();
 		crypto_nhpoly1305_update_helper(desc, src, n, _nh_neon);
 		kernel_neon_end();
 		src += n;
 		srclen -= n;
 	} while (srclen);
 	return 0;
 }
 static struct shash_alg nhpoly1305_alg = {
 	.base.cra_name		= "nhpoly1305",
 	.base.cra_driver_name	= "nhpoly1305-neon",
 	.base.cra_priority	= 200,
 	.base.cra_ctxsize	= sizeof(struct nhpoly1305_key),
 	.base.cra_module	= THIS_MODULE,
 	.digestsize		= POLY1305_DIGEST_SIZE,
 	.init			= crypto_nhpoly1305_init,
 	.update			= nhpoly1305_neon_update,
 	.final			= crypto_nhpoly1305_final,
 	.setkey			= crypto_nhpoly1305_setkey,
 	.descsize		= sizeof(struct nhpoly1305_state),
 };
 static int __init nhpoly1305_mod_init(void)
 {
 	if (!(elf_hwcap & HWCAP_NEON))
 		return -ENODEV;
 	return crypto_register_shash(&nhpoly1305_alg);
 }
 static void __exit nhpoly1305_mod_exit(void)
 {
 	crypto_unregister_shash(&nhpoly1305_alg);
 }
 module_init(nhpoly1305_mod_init);
 module_exit(nhpoly1305_mod_exit);
 MODULE_DESCRIPTION("NHPoly1305 ε-almost-∆-universal hash function (NEON-accelerated)");
 MODULE_LICENSE("GPL v2");
 MODULE_AUTHOR("Eric Biggers <ebiggers@google.com>");
 MODULE_ALIAS_CRYPTO("nhpoly1305");
 MODULE_ALIAS_CRYPTO("nhpoly1305-neon");
--- a/arch/arm/include/asm/topology.h
+++ b/arch/arm/include/asm/topology.h
@@ -30,9 +30,15 @@ const struct cpumask *cpu_coregroup_mask(int cpu);
 /* Replace task scheduler's default frequency-invariant accounting */
 #define arch_scale_freq_capacity topology_get_freq_scale
 /* Replace task scheduler's default max-frequency-invariant accounting */
 #define arch_scale_max_freq_capacity topology_get_max_freq_scale
 /* Replace task scheduler's default cpu-invariant accounting */
 #define arch_scale_cpu_capacity topology_get_cpu_scale
 /* Enable topology flag updates */
 #define arch_update_cpu_topology topology_update_cpu_topology
 #else
 static inline void init_cpu_topology(void) { }
--- a/arch/arm/kernel/ftrace.c
+++ b/arch/arm/kernel/ftrace.c
@@ -227,9 +227,7 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
 			   unsigned long frame_pointer)
 {
 	unsigned long return_hooker = (unsigned long) &return_to_handler;
 	struct ftrace_graph_ent trace;
 	unsigned long old;
 	int err;
 	if (unlikely(atomic_read(&current->tracing_graph_pause)))
 		return;
@@ -237,21 +235,8 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
 	old = *parent;
 	*parent = return_hooker;
-	trace.func = self_addr;
+	if (function_graph_enter(old, self_addr, frame_pointer, NULL))
 	trace.depth = current->curr_ret_stack + 1;
 	/* Only trace if the calling function expects to */
 	if (!ftrace_graph_entry(&trace)) {
 		*parent = old;
 		return;
 	}
 	err = ftrace_push_return_trace(old, self_addr, &trace.depth,
 				       frame_pointer, NULL);
 	if (err == -EBUSY) {
 		*parent = old;
 		return;
 	}
 }
 #ifdef CONFIG_DYNAMIC_FTRACE
--- a/arch/arm/probes/kprobes/opt-arm.c
+++ b/arch/arm/probes/kprobes/opt-arm.c
@@ -247,7 +247,7 @@ int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *or
 	}
 	/* Copy arch-dep-instance from template. */
-	memcpy(code, &optprobe_template_entry,
+	memcpy(code, (unsigned char *)optprobe_template_entry,
 			TMPL_END_IDX * sizeof(kprobe_opcode_t));
 	/* Adjust buffer according to instruction. */
--- a/arch/arm64/boot/dts/arm/juno-r2.dts
+++ b/arch/arm64/boot/dts/arm/juno-r2.dts
@@ -99,6 +99,7 @@
 			clocks = <&scpi_dvfs 0>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <450>;
 		};
 		A72_1: cpu@1 {
@@ -116,6 +117,7 @@
 			clocks = <&scpi_dvfs 0>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <450>;
 		};
 		A53_0: cpu@100 {
@@ -133,6 +135,7 @@
 			clocks = <&scpi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <485>;
 			dynamic-power-coefficient = <140>;
 		};
 		A53_1: cpu@101 {
@@ -150,6 +153,7 @@
 			clocks = <&scpi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <485>;
 			dynamic-power-coefficient = <140>;
 		};
 		A53_2: cpu@102 {
@@ -167,6 +171,7 @@
 			clocks = <&scpi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <485>;
 			dynamic-power-coefficient = <140>;
 		};
 		A53_3: cpu@103 {
@@ -184,6 +189,7 @@
 			clocks = <&scpi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <485>;
 			dynamic-power-coefficient = <140>;
 		};
 		A72_L2: l2-cache0 {
--- a/arch/arm64/boot/dts/arm/juno.dts
+++ b/arch/arm64/boot/dts/arm/juno.dts
@@ -98,6 +98,7 @@
 			clocks = <&scpi_dvfs 0>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <530>;
 		};
 		A57_1: cpu@1 {
@@ -115,6 +116,7 @@
 			clocks = <&scpi_dvfs 0>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <1024>;
 			dynamic-power-coefficient = <530>;
 		};
 		A53_0: cpu@100 {
@@ -132,6 +134,7 @@
 			clocks = <&scpi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <578>;
 			dynamic-power-coefficient = <140>;
 		};
 		A53_1: cpu@101 {
@@ -149,6 +152,7 @@
 			clocks = <&scpi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <578>;
 			dynamic-power-coefficient = <140>;
 		};
 		A53_2: cpu@102 {
@@ -166,6 +170,7 @@
 			clocks = <&scpi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <578>;
 			dynamic-power-coefficient = <140>;
 		};
 		A53_3: cpu@103 {
@@ -183,6 +188,7 @@
 			clocks = <&scpi_dvfs 1>;
 			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
 			capacity-dmips-mhz = <578>;
 			dynamic-power-coefficient = <140>;
 		};
 		A57_L2: l2-cache0 {
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -662,7 +662,7 @@
 			clock-names = "fck", "brg_int", "scif_clk";
 			dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 			       <&dmac2 0x35>, <&dmac2 0x34>;
-			dma-names = "tx", "rx";
+			dma-names = "tx", "rx", "tx", "rx";
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			resets = <&cpg 518>;
 			status = "disabled";
--- a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
@@ -15,7 +15,7 @@
 	aliases {
 		serial0 = &scif0;
-		ethernet0 = &avb;
+		ethernet0 = &gether;
 	};
 	chosen {
@@ -47,23 +47,6 @@
 	};
 };
 &avb {
 	pinctrl-0 = <&avb_pins>;
 	pinctrl-names = "default";
 	phy-mode = "rgmii-id";
 	phy-handle = <&phy0>;
 	renesas,no-ether-link;
 	status = "okay";
 	phy0: ethernet-phy@0 {
 		rxc-skew-ps = <1500>;
 		reg = <0>;
 		interrupt-parent = <&gpio1>;
 		interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
 	};
 };
 &canfd {
 	pinctrl-0 = <&canfd0_pins>;
 	pinctrl-names = "default";
@@ -82,6 +65,23 @@
 	clock-frequency = <32768>;
 };
 &gether {
 	pinctrl-0 = <&gether_pins>;
 	pinctrl-names = "default";
 	phy-mode = "rgmii-id";
 	phy-handle = <&phy0>;
 	renesas,no-ether-link;
 	status = "okay";
 	phy0: ethernet-phy@0 {
 		rxc-skew-ps = <1500>;
 		reg = <0>;
 		interrupt-parent = <&gpio4>;
 		interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
 	};
 };
 &i2c0 {
 	pinctrl-0 = <&i2c0_pins>;
 	pinctrl-names = "default";
@@ -118,16 +118,17 @@
 };
 &pfc {
 	avb_pins: avb {
 		groups = "avb_mdio", "avb_rgmii";
 		function = "avb";
 	};
 	canfd0_pins: canfd0 {
 		groups = "canfd0_data_a";
 		function = "canfd0";
 	};
 	gether_pins: gether {
 		groups = "gether_mdio_a", "gether_rgmii",
 			 "gether_txcrefclk", "gether_txcrefclk_mega";
 		function = "gether";
 	};
 	i2c0_pins: i2c0 {
 		groups = "i2c0";
 		function = "i2c0";
--- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
@@ -75,18 +75,6 @@
 		regulator-always-on;
 		vin-supply = <&vcc_sys>;
 	};
 	vdd_log: vdd-log {
 		compatible = "pwm-regulator";
 		pwms = <&pwm2 0 25000 0>;
 		regulator-name = "vdd_log";
 		regulator-min-microvolt = <800000>;
 		regulator-max-microvolt = <1400000>;
 		regulator-always-on;
 		regulator-boot-on;
 		vin-supply = <&vcc_sys>;
 	};
 };
 &cpu_l0 {
--- a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
@@ -153,7 +153,7 @@
 };
 &pcie0 {
-	ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>;
+	ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
 	num-lanes = <4>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pcie_clkreqn_cpm>;
--- a/arch/arm64/configs/cuttlefish_defconfig
+++ b/arch/arm64/configs/cuttlefish_defconfig
@@ -0,0 +1,432 @@
 CONFIG_AUDIT=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT=y
 CONFIG_TASKSTATS=y
 CONFIG_TASK_DELAY_ACCT=y
 CONFIG_TASK_XACCT=y
 CONFIG_TASK_IO_ACCOUNTING=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_MEMCG=y
 CONFIG_MEMCG_SWAP=y
 CONFIG_RT_GROUP_SCHED=y
 CONFIG_CGROUP_FREEZER=y
 CONFIG_CPUSETS=y
 # CONFIG_PROC_PID_CPUSET is not set
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_CGROUP_BPF=y
 CONFIG_SCHED_AUTOGROUP=y
 CONFIG_SCHED_TUNE=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
 # CONFIG_RD_XZ is not set
 # CONFIG_RD_LZO is not set
 # CONFIG_RD_LZ4 is not set
 CONFIG_SGETMASK_SYSCALL=y
 # CONFIG_SYSFS_SYSCALL is not set
 # CONFIG_FHANDLE is not set
 CONFIG_KALLSYMS_ALL=y
 CONFIG_BPF_SYSCALL=y
 # CONFIG_RSEQ is not set
 CONFIG_EMBEDDED=y
 # CONFIG_VM_EVENT_COUNTERS is not set
 # CONFIG_COMPAT_BRK is not set
 # CONFIG_SLAB_MERGE_DEFAULT is not set
 CONFIG_PROFILING=y
 CONFIG_PCI=y
 CONFIG_PCI_HOST_GENERIC=y
 CONFIG_HZ_100=y
 CONFIG_SECCOMP=y
 CONFIG_PARAVIRT=y
 CONFIG_ARMV8_DEPRECATED=y
 CONFIG_SWP_EMULATION=y
 CONFIG_CP15_BARRIER_EMULATION=y
 CONFIG_SETEND_EMULATION=y
 CONFIG_ARM64_SW_TTBR0_PAN=y
 CONFIG_RANDOMIZE_BASE=y
 CONFIG_CMDLINE="console=ttyAMA0"
 CONFIG_CMDLINE_EXTEND=y
 # CONFIG_EFI is not set
 CONFIG_COMPAT=y
 CONFIG_PM_WAKELOCKS=y
 CONFIG_PM_WAKELOCKS_LIMIT=0
 # CONFIG_PM_WAKELOCKS_GC is not set
 CONFIG_PM_DEBUG=y
 CONFIG_ENERGY_MODEL=y
 CONFIG_CPU_IDLE=y
 CONFIG_ARM_CPUIDLE=y
 CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
 CONFIG_CPU_FREQ_GOV_POWERSAVE=y
 CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
 CONFIG_CPUFREQ_DT=y
 CONFIG_ARM_BIG_LITTLE_CPUFREQ=y
 CONFIG_ARM_DT_BL_CPUFREQ=y
 CONFIG_ARM_SCPI_CPUFREQ=y
 CONFIG_ARM_SCMI_CPUFREQ=y
 CONFIG_ARM_SCMI_PROTOCOL=y
 # CONFIG_ARM_SCMI_POWER_DOMAIN is not set
 CONFIG_ARM_SCPI_PROTOCOL=y
 # CONFIG_ARM_SCPI_POWER_DOMAIN is not set
 CONFIG_KPROBES=y
 CONFIG_JUMP_LABEL=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 # CONFIG_SPARSEMEM_VMEMMAP is not set
 CONFIG_KSM=y
 CONFIG_TRANSPARENT_HUGEPAGE=y
 CONFIG_ZSMALLOC=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
 CONFIG_XFRM_USER=y
 CONFIG_NET_KEY=y
 CONFIG_INET=y
 CONFIG_IP_MULTICAST=y
 CONFIG_IP_ADVANCED_ROUTER=y
 CONFIG_IP_MULTIPLE_TABLES=y
 CONFIG_NET_IPGRE_DEMUX=y
 CONFIG_NET_IPVTI=y
 CONFIG_INET_ESP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 CONFIG_INET_UDP_DIAG=y
 CONFIG_INET_DIAG_DESTROY=y
 CONFIG_TCP_CONG_ADVANCED=y
 # CONFIG_TCP_CONG_BIC is not set
 # CONFIG_TCP_CONG_WESTWOOD is not set
 # CONFIG_TCP_CONG_HTCP is not set
 CONFIG_IPV6_ROUTER_PREF=y
 CONFIG_IPV6_ROUTE_INFO=y
 CONFIG_IPV6_OPTIMISTIC_DAD=y
 CONFIG_INET6_ESP=y
 CONFIG_INET6_IPCOMP=y
 CONFIG_IPV6_MIP6=y
 CONFIG_IPV6_VTI=y
 CONFIG_IPV6_MULTIPLE_TABLES=y
 CONFIG_NETFILTER=y
 CONFIG_NF_CONNTRACK=y
 CONFIG_NF_CONNTRACK_SECMARK=y
 CONFIG_NF_CONNTRACK_EVENTS=y
 CONFIG_NF_CONNTRACK_AMANDA=y
 CONFIG_NF_CONNTRACK_FTP=y
 CONFIG_NF_CONNTRACK_H323=y
 CONFIG_NF_CONNTRACK_IRC=y
 CONFIG_NF_CONNTRACK_NETBIOS_NS=y
 CONFIG_NF_CONNTRACK_PPTP=y
 CONFIG_NF_CONNTRACK_SANE=y
 CONFIG_NF_CONNTRACK_TFTP=y
 CONFIG_NF_CT_NETLINK=y
 CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
 CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
 CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
 CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
 CONFIG_NETFILTER_XT_TARGET_MARK=y
 CONFIG_NETFILTER_XT_TARGET_NFLOG=y
 CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
 CONFIG_NETFILTER_XT_TARGET_TPROXY=y
 CONFIG_NETFILTER_XT_TARGET_TRACE=y
 CONFIG_NETFILTER_XT_TARGET_SECMARK=y
 CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
 CONFIG_NETFILTER_XT_MATCH_BPF=y
 CONFIG_NETFILTER_XT_MATCH_COMMENT=y
 CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
 CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
 CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
 CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
 CONFIG_NETFILTER_XT_MATCH_HELPER=y
 CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
 CONFIG_NETFILTER_XT_MATCH_LENGTH=y
 CONFIG_NETFILTER_XT_MATCH_LIMIT=y
 CONFIG_NETFILTER_XT_MATCH_MAC=y
 CONFIG_NETFILTER_XT_MATCH_MARK=y
 CONFIG_NETFILTER_XT_MATCH_POLICY=y
 CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
 CONFIG_NETFILTER_XT_MATCH_QUOTA=y
 CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
 CONFIG_NETFILTER_XT_MATCH_SOCKET=y
 CONFIG_NETFILTER_XT_MATCH_STATE=y
 CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
 CONFIG_NETFILTER_XT_MATCH_STRING=y
 CONFIG_NETFILTER_XT_MATCH_TIME=y
 CONFIG_NETFILTER_XT_MATCH_U32=y
 CONFIG_IP_NF_IPTABLES=y
 CONFIG_IP_NF_MATCH_ECN=y
 CONFIG_IP_NF_MATCH_TTL=y
 CONFIG_IP_NF_FILTER=y
 CONFIG_IP_NF_TARGET_REJECT=y
 CONFIG_IP_NF_NAT=y
 CONFIG_IP_NF_TARGET_MASQUERADE=y
 CONFIG_IP_NF_TARGET_NETMAP=y
 CONFIG_IP_NF_TARGET_REDIRECT=y
 CONFIG_IP_NF_MANGLE=y
 CONFIG_IP_NF_RAW=y
 CONFIG_IP_NF_SECURITY=y
 CONFIG_IP_NF_ARPTABLES=y
 CONFIG_IP_NF_ARPFILTER=y
 CONFIG_IP_NF_ARP_MANGLE=y
 CONFIG_IP6_NF_IPTABLES=y
 CONFIG_IP6_NF_MATCH_RPFILTER=y
 CONFIG_IP6_NF_FILTER=y
 CONFIG_IP6_NF_TARGET_REJECT=y
 CONFIG_IP6_NF_MANGLE=y
 CONFIG_IP6_NF_RAW=y
 CONFIG_L2TP=y
 CONFIG_NET_SCHED=y
 CONFIG_NET_SCH_HTB=y
 CONFIG_NET_CLS_U32=y
 CONFIG_NET_EMATCH=y
 CONFIG_NET_EMATCH_U32=y
 CONFIG_NET_CLS_ACT=y
 CONFIG_CFG80211=y
 # CONFIG_CFG80211_DEFAULT_PS is not set
 # CONFIG_CFG80211_CRDA_SUPPORT is not set
 CONFIG_MAC80211=y
 # CONFIG_MAC80211_RC_MINSTREL is not set
 CONFIG_RFKILL=y
 # CONFIG_UEVENT_HELPER is not set
 CONFIG_DEVTMPFS=y
 # CONFIG_ALLOW_DEV_COREDUMP is not set
 CONFIG_DEBUG_DEVRES=y
 CONFIG_OF_UNITTEST=y
 CONFIG_ZRAM=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
 CONFIG_VIRTIO_BLK=y
 CONFIG_UID_SYS_STATS=y
 CONFIG_SCSI=y
 # CONFIG_SCSI_MQ_DEFAULT is not set
 # CONFIG_SCSI_PROC_FS is not set
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_VIRTIO=y
 CONFIG_MD=y
 CONFIG_BLK_DEV_DM=y
 CONFIG_DM_CRYPT=y
 CONFIG_DM_UEVENT=y
 CONFIG_DM_VERITY=y
 CONFIG_DM_VERITY_AVB=y
 CONFIG_DM_VERITY_FEC=y
 CONFIG_NETDEVICES=y
 CONFIG_NETCONSOLE=y
 CONFIG_NETCONSOLE_DYNAMIC=y
 CONFIG_TUN=y
 CONFIG_VIRTIO_NET=y
 # CONFIG_ETHERNET is not set
 CONFIG_PHYLIB=y
 CONFIG_PPP=y
 CONFIG_PPP_BSDCOMP=y
 CONFIG_PPP_DEFLATE=y
 CONFIG_PPP_MPPE=y
 CONFIG_PPTP=y
 CONFIG_PPPOL2TP=y
 CONFIG_USB_USBNET=y
 # CONFIG_USB_NET_AX8817X is not set
 # CONFIG_USB_NET_AX88179_178A is not set
 # CONFIG_USB_NET_CDCETHER is not set
 # CONFIG_USB_NET_CDC_NCM is not set
 # CONFIG_USB_NET_NET1080 is not set
 # CONFIG_USB_NET_CDC_SUBSET is not set
 # CONFIG_USB_NET_ZAURUS is not set
 # CONFIG_WLAN_VENDOR_ADMTEK is not set
 # CONFIG_WLAN_VENDOR_ATH is not set
 # CONFIG_WLAN_VENDOR_ATMEL is not set
 # CONFIG_WLAN_VENDOR_BROADCOM is not set
 # CONFIG_WLAN_VENDOR_CISCO is not set
 # CONFIG_WLAN_VENDOR_INTEL is not set
 # CONFIG_WLAN_VENDOR_INTERSIL is not set
 # CONFIG_WLAN_VENDOR_MARVELL is not set
 # CONFIG_WLAN_VENDOR_MEDIATEK is not set
 # CONFIG_WLAN_VENDOR_RALINK is not set
 # CONFIG_WLAN_VENDOR_REALTEK is not set
 # CONFIG_WLAN_VENDOR_RSI is not set
 # CONFIG_WLAN_VENDOR_ST is not set
 # CONFIG_WLAN_VENDOR_TI is not set
 # CONFIG_WLAN_VENDOR_ZYDAS is not set
 # CONFIG_WLAN_VENDOR_QUANTENNA is not set
 CONFIG_VIRT_WIFI=y
 CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_KEYBOARD is not set
 # CONFIG_INPUT_MOUSE is not set
 CONFIG_INPUT_JOYSTICK=y
 CONFIG_JOYSTICK_XPAD=y
 CONFIG_JOYSTICK_XPAD_FF=y
 CONFIG_JOYSTICK_XPAD_LEDS=y
 CONFIG_INPUT_TABLET=y
 CONFIG_TABLET_USB_ACECAD=y
 CONFIG_TABLET_USB_AIPTEK=y
 CONFIG_TABLET_USB_GTCO=y
 CONFIG_TABLET_USB_HANWANG=y
 CONFIG_TABLET_USB_KBTAB=y
 CONFIG_INPUT_MISC=y
 CONFIG_INPUT_UINPUT=y
 # CONFIG_VT is not set
 # CONFIG_LEGACY_PTYS is not set
 # CONFIG_DEVMEM is not set
 CONFIG_SERIAL_8250=y
 # CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
 CONFIG_SERIAL_8250_CONSOLE=y
 # CONFIG_SERIAL_8250_EXAR is not set
 CONFIG_SERIAL_8250_NR_UARTS=48
 CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_MANY_PORTS=y
 CONFIG_SERIAL_8250_SHARE_IRQ=y
 CONFIG_SERIAL_AMBA_PL011=y
 CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
 CONFIG_VIRTIO_CONSOLE=y
 CONFIG_HW_RANDOM=y
 CONFIG_HW_RANDOM_VIRTIO=y
 # CONFIG_HW_RANDOM_CAVIUM is not set
 # CONFIG_DEVPORT is not set
 # CONFIG_I2C_COMPAT is not set
 # CONFIG_I2C_HELPER_AUTO is not set
 # CONFIG_HWMON is not set
 CONFIG_THERMAL=y
 CONFIG_CPU_THERMAL=y
 CONFIG_MEDIA_SUPPORT=y
 # CONFIG_VGA_ARB is not set
 CONFIG_DRM=y
 # CONFIG_DRM_FBDEV_EMULATION is not set
 CONFIG_DRM_VIRTIO_GPU=y
 CONFIG_SOUND=y
 CONFIG_SND=y
 CONFIG_HIDRAW=y
 CONFIG_UHID=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_ACRUX=y
 CONFIG_HID_ACRUX_FF=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_PRODIKEYS=y
 CONFIG_HID_CYPRESS=y
 CONFIG_HID_DRAGONRISE=y
 CONFIG_DRAGONRISE_FF=y
 CONFIG_HID_EMS_FF=y
 CONFIG_HID_ELECOM=y
 CONFIG_HID_EZKEY=y
 CONFIG_HID_HOLTEK=y
 CONFIG_HID_KEYTOUCH=y
 CONFIG_HID_KYE=y
 CONFIG_HID_UCLOGIC=y
 CONFIG_HID_WALTOP=y
 CONFIG_HID_GYRATION=y
 CONFIG_HID_TWINHAN=y
 CONFIG_HID_KENSINGTON=y
 CONFIG_HID_LCPOWER=y
 CONFIG_HID_LOGITECH=y
 CONFIG_HID_LOGITECH_DJ=y
 CONFIG_LOGITECH_FF=y
 CONFIG_LOGIRUMBLEPAD2_FF=y
 CONFIG_LOGIG940_FF=y
 CONFIG_HID_MAGICMOUSE=y
 CONFIG_HID_MICROSOFT=y
 CONFIG_HID_MONTEREY=y
 CONFIG_HID_MULTITOUCH=y
 CONFIG_HID_NTRIG=y
 CONFIG_HID_ORTEK=y
 CONFIG_HID_PANTHERLORD=y
 CONFIG_PANTHERLORD_FF=y
 CONFIG_HID_PETALYNX=y
 CONFIG_HID_PICOLCD=y
 CONFIG_HID_PRIMAX=y
 CONFIG_HID_ROCCAT=y
 CONFIG_HID_SAITEK=y
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
 CONFIG_HID_SPEEDLINK=y
 CONFIG_HID_SUNPLUS=y
 CONFIG_HID_GREENASIA=y
 CONFIG_GREENASIA_FF=y
 CONFIG_HID_SMARTJOYPLUS=y
 CONFIG_SMARTJOYPLUS_FF=y
 CONFIG_HID_TIVO=y
 CONFIG_HID_TOPSEED=y
 CONFIG_HID_THRUSTMASTER=y
 CONFIG_HID_WACOM=y
 CONFIG_HID_WIIMOTE=y
 CONFIG_HID_ZEROPLUS=y
 CONFIG_HID_ZYDACRON=y
 CONFIG_USB_HIDDEV=y
 CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_CONFIGFS=y
 CONFIG_USB_CONFIGFS_UEVENT=y
 CONFIG_USB_CONFIGFS_F_FS=y
 CONFIG_USB_CONFIGFS_F_ACC=y
 CONFIG_USB_CONFIGFS_F_AUDIO_SRC=y
 CONFIG_USB_CONFIGFS_F_MIDI=y
 CONFIG_MMC=y
 # CONFIG_PWRSEQ_EMMC is not set
 # CONFIG_PWRSEQ_SIMPLE is not set
 # CONFIG_MMC_BLOCK is not set
 CONFIG_RTC_CLASS=y
 # CONFIG_RTC_HCTOSYS is not set
 # CONFIG_RTC_SYSTOHC is not set
 CONFIG_RTC_DRV_PL031=y
 CONFIG_VIRTIO_PCI=y
 # CONFIG_VIRTIO_PCI_LEGACY is not set
 CONFIG_VIRTIO_BALLOON=y
 CONFIG_VIRTIO_MMIO=y
 CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y
 CONFIG_STAGING=y
 CONFIG_ASHMEM=y
 CONFIG_ANDROID_VSOC=y
 CONFIG_ION=y
 CONFIG_COMMON_CLK_SCPI=y
 # CONFIG_COMMON_CLK_XGENE is not set
 CONFIG_MAILBOX=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_ANDROID=y
 CONFIG_ANDROID_BINDER_IPC=y
 CONFIG_LEGACY_ENERGY_MODEL_DT=y
 CONFIG_EXT4_FS=y
 CONFIG_EXT4_FS_SECURITY=y
 CONFIG_EXT4_ENCRYPTION=y
 CONFIG_F2FS_FS=y
 CONFIG_F2FS_FS_SECURITY=y
 CONFIG_F2FS_FS_ENCRYPTION=y
 # CONFIG_DNOTIFY is not set
 CONFIG_QUOTA=y
 CONFIG_QFMT_V2=y
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
 CONFIG_SDCARD_FS=y
 CONFIG_PSTORE=y
 CONFIG_PSTORE_CONSOLE=y
 CONFIG_PSTORE_RAM=y
 CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
 CONFIG_SECURITY=y
 CONFIG_SECURITY_NETWORK=y
 CONFIG_LSM_MMAP_MIN_ADDR=65536
 CONFIG_HARDENED_USERCOPY=y
 CONFIG_SECURITY_SELINUX=y
 CONFIG_CRYPTO_ADIANTUM=y
 CONFIG_CRYPTO_SHA512=y
 CONFIG_CRYPTO_LZ4=y
 CONFIG_CRYPTO_ZSTD=y
 CONFIG_CRYPTO_ANSI_CPRNG=y
 CONFIG_CRYPTO_DEV_VIRTIO=y
 CONFIG_XZ_DEC=y
 CONFIG_PRINTK_TIME=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 # CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_STACK_USAGE=y
 CONFIG_DEBUG_MEMORY_INIT=y
 CONFIG_SOFTLOCKUP_DETECTOR=y
 # CONFIG_DETECT_HUNG_TASK is not set
 CONFIG_PANIC_TIMEOUT=5
 CONFIG_SCHEDSTATS=y
 CONFIG_RCU_CPU_STALL_TIMEOUT=60
 CONFIG_ENABLE_DEFAULT_TRACERS=y
 # CONFIG_RUNTIME_TESTING_MENU is not set
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -19,9 +19,13 @@ CONFIG_BLK_CGROUP=y
 CONFIG_CGROUP_PIDS=y
 CONFIG_CGROUP_HUGETLB=y
 CONFIG_CPUSETS=y
 CONFIG_CGROUPS=y
 CONFIG_FAIR_GROUP_SCHED=y
 CONFIG_CGROUP_SCHED=y
 CONFIG_CGROUP_DEVICE=y
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_CGROUP_PERF=y
 CONFIG_CGROUP_FREEZER=y
 CONFIG_USER_NS=y
 CONFIG_SCHED_AUTOGROUP=y
 CONFIG_BLK_DEV_INITRD=y
@@ -101,13 +105,16 @@ CONFIG_XEN=y
 CONFIG_COMPAT=y
 CONFIG_HIBERNATION=y
 CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
 CONFIG_ENERGY_MODEL=y
 CONFIG_SCHED_TUNE=y
 CONFIG_ARM_CPUIDLE=y
 CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_STAT=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=m
+CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
 CONFIG_CPU_FREQ_GOV_POWERSAVE=y
 CONFIG_CPU_FREQ_GOV_USERSPACE=y
 CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
 CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
 CONFIG_CPUFREQ_DT=y
 CONFIG_ACPI_CPPC_CPUFREQ=m
--- a/arch/arm64/crypto/chacha20-neon-glue.c
+++ b/arch/arm64/crypto/chacha20-neon-glue.c
@@ -19,7 +19,7 @@
 */
 #include <crypto/algapi.h>
-#include <crypto/chacha20.h>
+#include <crypto/chacha.h>
 #include <crypto/internal/skcipher.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
@@ -34,15 +34,15 @@ asmlinkage void chacha20_4block_xor_neon(u32 *state, u8 *dst, const u8 *src);
 static void chacha20_doneon(u32 *state, u8 *dst, const u8 *src,
 			    unsigned int bytes)
 {
-	u8 buf[CHACHA20_BLOCK_SIZE];
+	u8 buf[CHACHA_BLOCK_SIZE];
-	while (bytes >= CHACHA20_BLOCK_SIZE * 4) {
+	while (bytes >= CHACHA_BLOCK_SIZE * 4) {
 		kernel_neon_begin();
 		chacha20_4block_xor_neon(state, dst, src);
 		kernel_neon_end();
-		bytes -= CHACHA20_BLOCK_SIZE * 4;
+		bytes -= CHACHA_BLOCK_SIZE * 4;
-		src += CHACHA20_BLOCK_SIZE * 4;
+		src += CHACHA_BLOCK_SIZE * 4;
-		dst += CHACHA20_BLOCK_SIZE * 4;
+		dst += CHACHA_BLOCK_SIZE * 4;
 		state[12] += 4;
 	}
@@ -50,11 +50,11 @@ static void chacha20_doneon(u32 *state, u8 *dst, const u8 *src,
 		return;
 	kernel_neon_begin();
-	while (bytes >= CHACHA20_BLOCK_SIZE) {
+	while (bytes >= CHACHA_BLOCK_SIZE) {
 		chacha20_block_xor_neon(state, dst, src);
-		bytes -= CHACHA20_BLOCK_SIZE;
+		bytes -= CHACHA_BLOCK_SIZE;
-		src += CHACHA20_BLOCK_SIZE;
+		src += CHACHA_BLOCK_SIZE;
-		dst += CHACHA20_BLOCK_SIZE;
+		dst += CHACHA_BLOCK_SIZE;
 		state[12]++;
 	}
 	if (bytes) {
@@ -68,17 +68,17 @@ static void chacha20_doneon(u32 *state, u8 *dst, const u8 *src,
 static int chacha20_neon(struct skcipher_request *req)
 {
 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
-	struct chacha20_ctx *ctx = crypto_skcipher_ctx(tfm);
+	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
 	struct skcipher_walk walk;
 	u32 state[16];
 	int err;
-	if (!may_use_simd() || req->cryptlen <= CHACHA20_BLOCK_SIZE)
+	if (!may_use_simd() || req->cryptlen <= CHACHA_BLOCK_SIZE)
-		return crypto_chacha20_crypt(req);
+		return crypto_chacha_crypt(req);
 	err = skcipher_walk_virt(&walk, req, false);
-	crypto_chacha20_init(state, ctx, walk.iv);
+	crypto_chacha_init(state, ctx, walk.iv);
 	while (walk.nbytes > 0) {
 		unsigned int nbytes = walk.nbytes;
@@ -99,14 +99,14 @@ static struct skcipher_alg alg = {
 	.base.cra_driver_name	= "chacha20-neon",
 	.base.cra_priority	= 300,
 	.base.cra_blocksize	= 1,
-	.base.cra_ctxsize	= sizeof(struct chacha20_ctx),
+	.base.cra_ctxsize	= sizeof(struct chacha_ctx),
 	.base.cra_module	= THIS_MODULE,
-	.min_keysize		= CHACHA20_KEY_SIZE,
+	.min_keysize		= CHACHA_KEY_SIZE,
-	.max_keysize		= CHACHA20_KEY_SIZE,
+	.max_keysize		= CHACHA_KEY_SIZE,
-	.ivsize			= CHACHA20_IV_SIZE,
+	.ivsize			= CHACHA_IV_SIZE,
-	.chunksize		= CHACHA20_BLOCK_SIZE,
+	.chunksize		= CHACHA_BLOCK_SIZE,
-	.walksize		= 4 * CHACHA20_BLOCK_SIZE,
+	.walksize		= 4 * CHACHA_BLOCK_SIZE,
 	.setkey			= crypto_chacha20_setkey,
 	.encrypt		= chacha20_neon,
 	.decrypt		= chacha20_neon,
--- a/arch/arm64/include/asm/ftrace.h
+++ b/arch/arm64/include/asm/ftrace.h
@@ -56,6 +56,19 @@ static inline bool arch_trace_is_compat_syscall(struct pt_regs *regs)
 {
 	return is_compat_task();
 }
 #define ARCH_HAS_SYSCALL_MATCH_SYM_NAME
 static inline bool arch_syscall_match_sym_name(const char *sym,
 					       const char *name)
 {
 	/*
 	 * Since all syscall functions have __arm64_ prefix, we must skip it.
 	 * However, as we described above, we decided to ignore compat
 	 * syscalls, so we don't care about __arm64_compat_ prefix here.
 	 */
 	return !strcmp(sym + 8, name);
 }
 #endif /* ifndef __ASSEMBLY__ */
 #endif /* __ASM_FTRACE_H */
--- a/arch/arm64/include/asm/percpu.h
+++ b/arch/arm64/include/asm/percpu.h
@@ -96,6 +96,7 @@ static inline unsigned long __percpu_##op(void *ptr,			\
 		: [val] "Ir" (val));					\
 		break;							\
 	default:							\
 		ret = 0;						\
 		BUILD_BUG();						\
 	}								\
 									\
@@ -125,6 +126,7 @@ static inline unsigned long __percpu_read(void *ptr, int size)
 		ret = READ_ONCE(*(u64 *)ptr);
 		break;
 	default:
 		ret = 0;
 		BUILD_BUG();
 	}
@@ -194,6 +196,7 @@ static inline unsigned long __percpu_xchg(void *ptr, unsigned long val,
 		: [val] "r" (val));
 		break;
 	default:
 		ret = 0;
 		BUILD_BUG();
 	}
--- a/arch/arm64/include/asm/topology.h
+++ b/arch/arm64/include/asm/topology.h
@@ -42,9 +42,15 @@ int pcibus_to_node(struct pci_bus *bus);
 /* Replace task scheduler's default frequency-invariant accounting */
 #define arch_scale_freq_capacity topology_get_freq_scale
 /* Replace task scheduler's default max-frequency-invariant accounting */
 #define arch_scale_max_freq_capacity topology_get_max_freq_scale
 /* Replace task scheduler's default cpu-invariant accounting */
 #define arch_scale_cpu_capacity topology_get_cpu_scale
 /* Enable topology flag updates */
 #define arch_update_cpu_topology topology_update_cpu_topology
 #include <asm-generic/topology.h>
 #endif /* _ASM_ARM_TOPOLOGY_H */
--- a/arch/arm64/kernel/ftrace.c
+++ b/arch/arm64/kernel/ftrace.c
@@ -216,8 +216,6 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
 {
 	unsigned long return_hooker = (unsigned long)&return_to_handler;
 	unsigned long old;
 	struct ftrace_graph_ent trace;
 	int err;
 	if (unlikely(atomic_read(&current->tracing_graph_pause)))
 		return;
@@ -229,18 +227,7 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
 	 */
 	old = *parent;
-	trace.func = self_addr;
+	if (!function_graph_enter(old, self_addr, frame_pointer, NULL))
 	trace.depth = current->curr_ret_stack + 1;
 	/* Only trace if the calling function expects to */
 	if (!ftrace_graph_entry(&trace))
 		return;
 	err = ftrace_push_return_trace(old, self_addr, &trace.depth,
 				       frame_pointer, NULL);
 	if (err == -EBUSY)
 		return;
 	else
 		*parent = return_hooker;
 }
--- a/arch/arm64/kernel/hibernate.c
+++ b/arch/arm64/kernel/hibernate.c
@@ -214,7 +214,7 @@ static int create_safe_exec_page(void *src_start, size_t length,
 	}
 	memcpy((void *)dst, src_start, length);
-	flush_icache_range(dst, dst + length);
+	__flush_icache_range(dst, dst + length);
 	pgdp = pgd_offset_raw(allocator(mask), dst_addr);
 	if (pgd_none(READ_ONCE(*pgdp))) {
--- a/arch/arm64/kernel/probes/kprobes.c
+++ b/arch/arm64/kernel/probes/kprobes.c
@@ -23,7 +23,9 @@
 #include <linux/slab.h>
 #include <linux/stop_machine.h>
 #include <linux/sched/debug.h>
 #include <linux/set_memory.h>
 #include <linux/stringify.h>
 #include <linux/vmalloc.h>
 #include <asm/traps.h>
 #include <asm/ptrace.h>
 #include <asm/cacheflush.h>
@@ -42,10 +44,21 @@ DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
 static void __kprobes
 post_kprobe_handler(struct kprobe_ctlblk *, struct pt_regs *);
 static int __kprobes patch_text(kprobe_opcode_t *addr, u32 opcode)
 {
 	void *addrs[1];
 	u32 insns[1];
 	addrs[0] = addr;
 	insns[0] = opcode;
 	return aarch64_insn_patch_text(addrs, insns, 1);
 }
 static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
 {
 	/* prepare insn slot */
-	p->ainsn.api.insn[0] = cpu_to_le32(p->opcode);
+	patch_text(p->ainsn.api.insn, p->opcode);
 	flush_icache_range((uintptr_t) (p->ainsn.api.insn),
 			   (uintptr_t) (p->ainsn.api.insn) +
@@ -118,15 +131,15 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
 	return 0;
 }
-static int __kprobes patch_text(kprobe_opcode_t *addr, u32 opcode)
+void *alloc_insn_page(void)
 {
-	void *addrs[1];
+	void *page;
 	u32 insns[1];
-	addrs[0] = (void *)addr;
+	page = vmalloc_exec(PAGE_SIZE);
-	insns[0] = (u32)opcode;
+	if (page)
 		set_memory_ro((unsigned long)page, 1);
-	return aarch64_insn_patch_text(addrs, insns, 1);
+	return page;
 }
 /* arm kprobe: install breakpoint in text */
--- a/arch/microblaze/kernel/ftrace.c
+++ b/arch/microblaze/kernel/ftrace.c
@@ -22,8 +22,7 @@
 void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
 {
 	unsigned long old;
-	int faulted, err;
+	int faulted;
 	struct ftrace_graph_ent trace;
 	unsigned long return_hooker = (unsigned long)
 				&return_to_handler;
@@ -63,18 +62,8 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
 		return;
 	}
-	err = ftrace_push_return_trace(old, self_addr, &trace.depth, 0, NULL);
+	if (function_graph_enter(old, self_addr, 0, NULL))
 	if (err == -EBUSY) {
 		*parent = old;
 		return;
 	}
 	trace.func = self_addr;
 	/* Only trace if the calling function expects to */
 	if (!ftrace_graph_entry(&trace)) {
 		current->curr_ret_stack--;
 		*parent = old;
 	}
 }
 #endif /* CONFIG_FUNCTION_GRAPH_TRACER */
--- a/arch/mips/configs/cavium_octeon_defconfig
+++ b/arch/mips/configs/cavium_octeon_defconfig
@@ -140,6 +140,7 @@ CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_DS1307=y
 CONFIG_STAGING=y
 CONFIG_OCTEON_ETHERNET=y
 CONFIG_OCTEON_USB=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_RAS=y
 CONFIG_EXT4_FS=y
--- a/arch/mips/include/asm/syscall.h
+++ b/arch/mips/include/asm/syscall.h
@@ -73,7 +73,7 @@ static inline unsigned long mips_get_syscall_arg(unsigned long *arg,
 #ifdef CONFIG_64BIT
 	case 4: case 5: case 6: case 7:
 #ifdef CONFIG_MIPS32_O32
-		if (test_thread_flag(TIF_32BIT_REGS))
+		if (test_tsk_thread_flag(task, TIF_32BIT_REGS))
 			return get_user(*arg, (int *)usp + n);
 		else
 #endif
--- a/arch/mips/kernel/ftrace.c
+++ b/arch/mips/kernel/ftrace.c
@@ -322,7 +322,6 @@ void prepare_ftrace_return(unsigned long *parent_ra_addr, unsigned long self_ra,
 			   unsigned long fp)
 {
 	unsigned long old_parent_ra;
 	struct ftrace_graph_ent trace;
 	unsigned long return_hooker = (unsigned long)
 	    &return_to_handler;
 	int faulted, insns;
@@ -369,12 +368,6 @@ void prepare_ftrace_return(unsigned long *parent_ra_addr, unsigned long self_ra,
 	if (unlikely(faulted))
 		goto out;
 	if (ftrace_push_return_trace(old_parent_ra, self_ra, &trace.depth, fp,
 				     NULL) == -EBUSY) {
 		*parent_ra_addr = old_parent_ra;
 		return;
 	}
 	/*
 	 * Get the recorded ip of the current mcount calling site in the
 	 * __mcount_loc section, which will be used to filter the function
@@ -382,13 +375,10 @@ void prepare_ftrace_return(unsigned long *parent_ra_addr, unsigned long self_ra,
 	 */
 	insns = core_kernel_text(self_ra) ? 2 : MCOUNT_OFFSET_INSNS + 1;
-	trace.func = self_ra - (MCOUNT_INSN_SIZE * insns);
+	self_ra -= (MCOUNT_INSN_SIZE * insns);
-	/* Only trace if the calling function expects to */
+	if (function_graph_enter(old_parent_ra, self_ra, fp, NULL))
 	if (!ftrace_graph_entry(&trace)) {
 		current->curr_ret_stack--;
 		*parent_ra_addr = old_parent_ra;
 	}
 	return;
 out:
 	ftrace_graph_stop();
--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
@@ -84,7 +84,7 @@ static struct rt2880_pmx_func pcie_rst_grp[] = {
 };
 static struct rt2880_pmx_func nd_sd_grp[] = {
 	FUNC("nand", MT7620_GPIO_MODE_NAND, 45, 15),
-	FUNC("sd", MT7620_GPIO_MODE_SD, 45, 15)
+	FUNC("sd", MT7620_GPIO_MODE_SD, 47, 13)
 };
 static struct rt2880_pmx_group mt7620a_pinmux_data[] = {
--- a/arch/nds32/kernel/ftrace.c
+++ b/arch/nds32/kernel/ftrace.c
@@ -211,29 +211,15 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
 			   unsigned long frame_pointer)
 {
 	unsigned long return_hooker = (unsigned long)&return_to_handler;
 	struct ftrace_graph_ent trace;
 	unsigned long old;
 	int err;
 	if (unlikely(atomic_read(&current->tracing_graph_pause)))
 		return;
 	old = *parent;
-	trace.func = self_addr;
+	if (!function_graph_enter(old, self_addr, frame_pointer, NULL))
-	trace.depth = current->curr_ret_stack + 1;
+		*parent = return_hooker;
 	/* Only trace if the calling function expects to */
 	if (!ftrace_graph_entry(&trace))
 		return;
 	err = ftrace_push_return_trace(old, self_addr, &trace.depth,
 				       frame_pointer, NULL);
 	if (err == -EBUSY)
 		return;
 	*parent = return_hooker;
 }
 noinline void ftrace_graph_caller(void)
--- a/arch/parisc/Makefile
+++ b/arch/parisc/Makefile
@@ -71,6 +71,13 @@ ifdef CONFIG_MLONGCALLS
 KBUILD_CFLAGS_KERNEL += -mlong-calls
 endif
 # Without this, "ld -r" results in .text sections that are too big (> 0x40000)
 # for branches to reach stubs. And multiple .text sections trigger a warning
 # when creating the sysfs module information section.
 ifndef CONFIG_64BIT
 KBUILD_CFLAGS_MODULE += -ffunction-sections
 endif
 # select which processor to optimise for
 cflags-$(CONFIG_PA7000)		+= -march=1.1 -mschedule=7100
 cflags-$(CONFIG_PA7200)		+= -march=1.1 -mschedule=7200
--- a/arch/parisc/kernel/ftrace.c
+++ b/arch/parisc/kernel/ftrace.c
@@ -30,7 +30,6 @@ static void __hot prepare_ftrace_return(unsigned long *parent,
 					unsigned long self_addr)
 {
 	unsigned long old;
 	struct ftrace_graph_ent trace;
 	extern int parisc_return_to_handler;
 	if (unlikely(ftrace_graph_is_dead()))
@@ -41,19 +40,9 @@ static void __hot prepare_ftrace_return(unsigned long *parent,
 	old = *parent;
-	trace.func = self_addr;
+	if (!function_graph_enter(old, self_addr, 0, NULL))
-	trace.depth = current->curr_ret_stack + 1;
+		/* activate parisc_return_to_handler() as return point */
-
+		*parent = (unsigned long) &parisc_return_to_handler;
 	/* Only trace if the calling function expects to */
 	if (!ftrace_graph_entry(&trace))
 		return;
        if (ftrace_push_return_trace(old, self_addr, &trace.depth,
 				     0, NULL) == -EBUSY)
                return;
 	/* activate parisc_return_to_handler() as return point */
 	*parent = (unsigned long) &parisc_return_to_handler;
 }
 #endif /* CONFIG_FUNCTION_GRAPH_TRACER */
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -285,19 +285,13 @@ extern void _memcpy_toio(volatile void __iomem *dest, const void *src,
 * their hooks, a bitfield is reserved for use by the platform near the
 * top of MMIO addresses (not PIO, those have to cope the hard way).
 *
- * This bit field is 12 bits and is at the top of the IO virtual
+ * The highest address in the kernel virtual space are:
 * addresses PCI_IO_INDIRECT_TOKEN_MASK.
 *
- * The kernel virtual space is thus:
+ *  d0003fffffffffff	# with Hash MMU
 *  c00fffffffffffff	# with Radix MMU
 *
- *  0xD000000000000000		: vmalloc
+ * The top 4 bits are reserved as the region ID on hash, leaving us 8 bits
- *  0xD000080000000000		: PCI PHB IO space
+ * that can be used for the field.
 *  0xD000080080000000		: ioremap
 *  0xD0000fffffffffff		: end of ioremap region
 *
 * Since the top 4 bits are reserved as the region ID, we use thus
 * the next 12 bits and keep 4 bits available for the future if the
 * virtual address space is ever to be extended.
 *
 * The direct IO mapping operations will then mask off those bits
 * before doing the actual access, though that only happen when
@@ -309,8 +303,8 @@ extern void _memcpy_toio(volatile void __iomem *dest, const void *src,
 */
 #ifdef CONFIG_PPC_INDIRECT_MMIO
-#define PCI_IO_IND_TOKEN_MASK	0x0fff000000000000ul
+#define PCI_IO_IND_TOKEN_SHIFT	52
-#define PCI_IO_IND_TOKEN_SHIFT	48
+#define PCI_IO_IND_TOKEN_MASK	(0xfful << PCI_IO_IND_TOKEN_SHIFT)
 #define PCI_FIX_ADDR(addr)						\
 	((PCI_IO_ADDR)(((unsigned long)(addr)) & ~PCI_IO_IND_TOKEN_MASK))
 #define PCI_GET_ADDR_TOKEN(addr)					\
--- a/arch/powerpc/kernel/trace/ftrace.c
+++ b/arch/powerpc/kernel/trace/ftrace.c
@@ -697,7 +697,6 @@ int ftrace_disable_ftrace_graph_caller(void)
 */
 unsigned long prepare_ftrace_return(unsigned long parent, unsigned long ip)
 {
 	struct ftrace_graph_ent trace;
 	unsigned long return_hooker;
 	if (unlikely(ftrace_graph_is_dead()))
@@ -708,18 +707,8 @@ unsigned long prepare_ftrace_return(unsigned long parent, unsigned long ip)
 	return_hooker = ppc_function_entry(return_to_handler);
-	trace.func = ip;
+	if (!function_graph_enter(parent, ip, 0, NULL))
-	trace.depth = current->curr_ret_stack + 1;
+		parent = return_hooker;
 	/* Only trace if the calling function expects to */
 	if (!ftrace_graph_entry(&trace))
 		goto out;
 	if (ftrace_push_return_trace(parent, ip, &trace.depth, 0,
 				     NULL) == -EBUSY)
 		goto out;
 	parent = return_hooker;
 out:
 	return parent;
 }
--- a/arch/powerpc/kvm/trace.h
+++ b/arch/powerpc/kvm/trace.h
@@ -6,8 +6,6 @@
 #undef TRACE_SYSTEM
 #define TRACE_SYSTEM kvm
 #define TRACE_INCLUDE_PATH .
 #define TRACE_INCLUDE_FILE trace
 /*
 * Tracepoint for guest mode entry.
@@ -120,4 +118,10 @@ TRACE_EVENT(kvm_check_requests,
 #endif /* _TRACE_KVM_H */
 /* This part must be outside protection */
 #undef TRACE_INCLUDE_PATH
 #undef TRACE_INCLUDE_FILE
 #define TRACE_INCLUDE_PATH .
 #define TRACE_INCLUDE_FILE trace
 #include <trace/define_trace.h>
--- a/arch/powerpc/kvm/trace_booke.h
+++ b/arch/powerpc/kvm/trace_booke.h
@@ -6,8 +6,6 @@
 #undef TRACE_SYSTEM
 #define TRACE_SYSTEM kvm_booke
 #define TRACE_INCLUDE_PATH .
 #define TRACE_INCLUDE_FILE trace_booke
 #define kvm_trace_symbol_exit \
 	{0, "CRITICAL"}, \
@@ -218,4 +216,11 @@ TRACE_EVENT(kvm_booke_queue_irqprio,
 #endif
 /* This part must be outside protection */
 #undef TRACE_INCLUDE_PATH
 #undef TRACE_INCLUDE_FILE
 #define TRACE_INCLUDE_PATH .
 #define TRACE_INCLUDE_FILE trace_booke
 #include <trace/define_trace.h>
--- a/arch/powerpc/kvm/trace_hv.h
+++ b/arch/powerpc/kvm/trace_hv.h
@@ -9,8 +9,6 @@
 #undef TRACE_SYSTEM
 #define TRACE_SYSTEM kvm_hv
 #define TRACE_INCLUDE_PATH .
 #define TRACE_INCLUDE_FILE trace_hv
 #define kvm_trace_symbol_hcall \
 	{H_REMOVE,			"H_REMOVE"}, \
@@ -497,4 +495,11 @@ TRACE_EVENT(kvmppc_run_vcpu_exit,
 #endif /* _TRACE_KVM_HV_H */
 /* This part must be outside protection */
 #undef TRACE_INCLUDE_PATH
 #undef TRACE_INCLUDE_FILE
 #define TRACE_INCLUDE_PATH .
 #define TRACE_INCLUDE_FILE trace_hv
 #include <trace/define_trace.h>
--- a/arch/powerpc/kvm/trace_pr.h
+++ b/arch/powerpc/kvm/trace_pr.h
@@ -8,8 +8,6 @@
 #undef TRACE_SYSTEM
 #define TRACE_SYSTEM kvm_pr
 #define TRACE_INCLUDE_PATH .
 #define TRACE_INCLUDE_FILE trace_pr
 TRACE_EVENT(kvm_book3s_reenter,
 	TP_PROTO(int r, struct kvm_vcpu *vcpu),
@@ -257,4 +255,11 @@ TRACE_EVENT(kvm_exit,
 #endif /* _TRACE_KVM_H */
 /* This part must be outside protection */
 #undef TRACE_INCLUDE_PATH
 #undef TRACE_INCLUDE_FILE
 #define TRACE_INCLUDE_PATH .
 #define TRACE_INCLUDE_FILE trace_pr
 #include <trace/define_trace.h>
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -1179,7 +1179,7 @@ static long vphn_get_associativity(unsigned long cpu,
 	switch (rc) {
 	case H_FUNCTION:
-		printk(KERN_INFO
+		printk_once(KERN_INFO
 			"VPHN is not supported. Disabling polling...\n");
 		stop_topology_update();
 		break;
--- a/arch/riscv/Makefile
+++ b/arch/riscv/Makefile
@@ -82,4 +82,8 @@ core-y += arch/riscv/kernel/ arch/riscv/mm/
 libs-y += arch/riscv/lib/
 PHONY += vdso_install
 vdso_install:
 	$(Q)$(MAKE) $(build)=arch/riscv/kernel/vdso $@
 all: vmlinux
--- a/arch/riscv/include/asm/module.h
+++ b/arch/riscv/include/asm/module.h
@@ -8,6 +8,7 @@
 #define MODULE_ARCH_VERMAGIC    "riscv"
 struct module;
 u64 module_emit_got_entry(struct module *mod, u64 val);
 u64 module_emit_plt_entry(struct module *mod, u64 val);
--- a/arch/riscv/include/asm/uaccess.h
+++ b/arch/riscv/include/asm/uaccess.h
@@ -400,13 +400,13 @@ extern unsigned long __must_check __asm_copy_from_user(void *to,
 static inline unsigned long
 raw_copy_from_user(void *to, const void __user *from, unsigned long n)
 {
-	return __asm_copy_to_user(to, from, n);
+	return __asm_copy_from_user(to, from, n);
 }
 static inline unsigned long
 raw_copy_to_user(void __user *to, const void *from, unsigned long n)
 {
-	return __asm_copy_from_user(to, from, n);
+	return __asm_copy_to_user(to, from, n);
 }
 extern long strncpy_from_user(char *dest, const char __user *src, long count);
--- a/arch/riscv/kernel/ftrace.c
+++ b/arch/riscv/kernel/ftrace.c
@@ -132,7 +132,6 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
 {
 	unsigned long return_hooker = (unsigned long)&return_to_handler;
 	unsigned long old;
 	struct ftrace_graph_ent trace;
 	int err;
 	if (unlikely(atomic_read(&current->tracing_graph_pause)))
@@ -144,17 +143,8 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
 	 */
 	old = *parent;
-	trace.func = self_addr;
+	if (function_graph_enter(old, self_addr, frame_pointer, parent))
-	trace.depth = current->curr_ret_stack + 1;
+		*parent = return_hooker;
 	if (!ftrace_graph_entry(&trace))
 		return;
 	err = ftrace_push_return_trace(old, self_addr, &trace.depth,
 				       frame_pointer, parent);
 	if (err == -EBUSY)
 		return;
 	*parent = return_hooker;
 }
 #ifdef CONFIG_DYNAMIC_FTRACE
--- a/arch/riscv/kernel/module.c
+++ b/arch/riscv/kernel/module.c
@@ -21,7 +21,7 @@ static int apply_r_riscv_32_rela(struct module *me, u32 *location, Elf_Addr v)
 {
 	if (v != (u32)v) {
 		pr_err("%s: value %016llx out of range for 32-bit field\n",
-		       me->name, v);
+		       me->name, (long long)v);
 		return -EINVAL;
 	}
 	*location = v;
@@ -102,7 +102,7 @@ static int apply_r_riscv_pcrel_hi20_rela(struct module *me, u32 *location,
 	if (offset != (s32)offset) {
 		pr_err(
 		  "%s: target %016llx can not be addressed by the 32-bit offset from PC = %p\n",
-		  me->name, v, location);
+		  me->name, (long long)v, location);
 		return -EINVAL;
 	}
@@ -144,7 +144,7 @@ static int apply_r_riscv_hi20_rela(struct module *me, u32 *location,
 	if (IS_ENABLED(CMODEL_MEDLOW)) {
 		pr_err(
 		  "%s: target %016llx can not be addressed by the 32-bit offset from PC = %p\n",
-		  me->name, v, location);
+		  me->name, (long long)v, location);
 		return -EINVAL;
 	}
@@ -188,7 +188,7 @@ static int apply_r_riscv_got_hi20_rela(struct module *me, u32 *location,
 	} else {
 		pr_err(
 		  "%s: can not generate the GOT entry for symbol = %016llx from PC = %p\n",
-		  me->name, v, location);
+		  me->name, (long long)v, location);
 		return -EINVAL;
 	}
@@ -212,7 +212,7 @@ static int apply_r_riscv_call_plt_rela(struct module *me, u32 *location,
 		} else {
 			pr_err(
 			  "%s: target %016llx can not be addressed by the 32-bit offset from PC = %p\n",
-			  me->name, v, location);
+			  me->name, (long long)v, location);
 			return -EINVAL;
 		}
 	}
@@ -234,7 +234,7 @@ static int apply_r_riscv_call_rela(struct module *me, u32 *location,
 	if (offset != fill_v) {
 		pr_err(
 		  "%s: target %016llx can not be addressed by the 32-bit offset from PC = %p\n",
-		  me->name, v, location);
+		  me->name, (long long)v, location);
 		return -EINVAL;
 	}
--- a/arch/s390/boot/compressed/Makefile
+++ b/arch/s390/boot/compressed/Makefile
@@ -20,7 +20,7 @@ KBUILD_CFLAGS := $(KBUILD_CFLAGS_DECOMPRESSOR)
 OBJECTS := $(addprefix $(obj)/,$(obj-y))
 LDFLAGS_vmlinux := --oformat $(LD_BFD) -e startup -T
-$(obj)/vmlinux: $(obj)/vmlinux.lds $(objtree)/arch/s390/boot/startup.a $(OBJECTS)
+$(obj)/vmlinux: $(obj)/vmlinux.lds $(objtree)/arch/s390/boot/startup.a $(OBJECTS) FORCE
 	$(call if_changed,ld)
 # extract required uncompressed vmlinux symbols and adjust them to reflect offsets inside vmlinux.bin
@@ -51,17 +51,17 @@ suffix-$(CONFIG_KERNEL_LZMA)  := .lzma
 suffix-$(CONFIG_KERNEL_LZO)  := .lzo
 suffix-$(CONFIG_KERNEL_XZ)  := .xz
-$(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y)
+$(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE
 	$(call if_changed,gzip)
-$(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y)
+$(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) FORCE
 	$(call if_changed,bzip2)
-$(obj)/vmlinux.bin.lz4: $(vmlinux.bin.all-y)
+$(obj)/vmlinux.bin.lz4: $(vmlinux.bin.all-y) FORCE
 	$(call if_changed,lz4)
-$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y)
+$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE
 	$(call if_changed,lzma)
-$(obj)/vmlinux.bin.lzo: $(vmlinux.bin.all-y)
+$(obj)/vmlinux.bin.lzo: $(vmlinux.bin.all-y) FORCE
 	$(call if_changed,lzo)
-$(obj)/vmlinux.bin.xz: $(vmlinux.bin.all-y)
+$(obj)/vmlinux.bin.xz: $(vmlinux.bin.all-y) FORCE
 	$(call if_changed,xzkern)
 LDFLAGS_piggy.o := -r --format binary --oformat $(LD_BFD) -T
--- a/arch/s390/include/asm/mmu_context.h
+++ b/arch/s390/include/asm/mmu_context.h
@@ -45,8 +45,6 @@ static inline int init_new_context(struct task_struct *tsk,
 		mm->context.asce_limit = STACK_TOP_MAX;
 		mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
 				   _ASCE_USER_BITS | _ASCE_TYPE_REGION3;
 		/* pgd_alloc() did not account this pud */
 		mm_inc_nr_puds(mm);
 		break;
 	case -PAGE_SIZE:
 		/* forked 5-level task, set new asce with new_mm->pgd */
@@ -62,9 +60,6 @@ static inline int init_new_context(struct task_struct *tsk,
 		/* forked 2-level compat task, set new asce with new mm->pgd */
 		mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
 				   _ASCE_USER_BITS | _ASCE_TYPE_SEGMENT;
 		/* pgd_alloc() did not account this pmd */
 		mm_inc_nr_pmds(mm);
 		mm_inc_nr_puds(mm);
 	}
 	crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm));
 	return 0;
--- a/arch/s390/include/asm/pgalloc.h
+++ b/arch/s390/include/asm/pgalloc.h
@@ -36,11 +36,11 @@ static inline void crst_table_init(unsigned long *crst, unsigned long entry)
 static inline unsigned long pgd_entry_type(struct mm_struct *mm)
 {
-	if (mm->context.asce_limit <= _REGION3_SIZE)
+	if (mm_pmd_folded(mm))
 		return _SEGMENT_ENTRY_EMPTY;
-	if (mm->context.asce_limit <= _REGION2_SIZE)
+	if (mm_pud_folded(mm))
 		return _REGION3_ENTRY_EMPTY;
-	if (mm->context.asce_limit <= _REGION1_SIZE)
+	if (mm_p4d_folded(mm))
 		return _REGION2_ENTRY_EMPTY;
 	return _REGION1_ENTRY_EMPTY;
 }
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -485,6 +485,24 @@ static inline int is_module_addr(void *addr)
 				   _REGION_ENTRY_PROTECT | \
 				   _REGION_ENTRY_NOEXEC)
 static inline bool mm_p4d_folded(struct mm_struct *mm)
 {
 	return mm->context.asce_limit <= _REGION1_SIZE;
 }
 #define mm_p4d_folded(mm) mm_p4d_folded(mm)
 static inline bool mm_pud_folded(struct mm_struct *mm)
 {
 	return mm->context.asce_limit <= _REGION2_SIZE;
 }
 #define mm_pud_folded(mm) mm_pud_folded(mm)
 static inline bool mm_pmd_folded(struct mm_struct *mm)
 {
 	return mm->context.asce_limit <= _REGION3_SIZE;
 }
 #define mm_pmd_folded(mm) mm_pmd_folded(mm)
 static inline int mm_has_pgste(struct mm_struct *mm)
 {
 #ifdef CONFIG_PGSTE
--- a/arch/s390/include/asm/tlb.h
+++ b/arch/s390/include/asm/tlb.h
@@ -136,7 +136,7 @@ static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
 static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,
 				unsigned long address)
 {
-	if (tlb->mm->context.asce_limit <= _REGION3_SIZE)
+	if (mm_pmd_folded(tlb->mm))
 		return;
 	pgtable_pmd_page_dtor(virt_to_page(pmd));
 	tlb_remove_table(tlb, pmd);
@@ -152,7 +152,7 @@ static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,
 static inline void p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d,
 				unsigned long address)
 {
-	if (tlb->mm->context.asce_limit <= _REGION1_SIZE)
+	if (mm_p4d_folded(tlb->mm))
 		return;
 	tlb_remove_table(tlb, p4d);
 }
@@ -167,7 +167,7 @@ static inline void p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d,
 static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud,
 				unsigned long address)
 {
-	if (tlb->mm->context.asce_limit <= _REGION2_SIZE)
+	if (mm_pud_folded(tlb->mm))
 		return;
 	tlb_remove_table(tlb, pud);
 }
--- a/arch/s390/kernel/ftrace.c
+++ b/arch/s390/kernel/ftrace.c
@@ -203,22 +203,13 @@ device_initcall(ftrace_plt_init);
 */
 unsigned long prepare_ftrace_return(unsigned long parent, unsigned long ip)
 {
 	struct ftrace_graph_ent trace;
 	if (unlikely(ftrace_graph_is_dead()))
 		goto out;
 	if (unlikely(atomic_read(&current->tracing_graph_pause)))
 		goto out;
 	ip -= MCOUNT_INSN_SIZE;
-	trace.func = ip;
+	if (!function_graph_enter(parent, ip, 0, NULL))
-	trace.depth = current->curr_ret_stack + 1;
+		parent = (unsigned long) return_to_handler;
 	/* Only trace if the calling function expects to. */
 	if (!ftrace_graph_entry(&trace))
 		goto out;
 	if (ftrace_push_return_trace(parent, ip, &trace.depth, 0,
 				     NULL) == -EBUSY)
 		goto out;
 	parent = (unsigned long) return_to_handler;
 out:
 	return parent;
 }
--- a/arch/s390/kernel/perf_cpum_cf.c
+++ b/arch/s390/kernel/perf_cpum_cf.c
@@ -373,7 +373,7 @@ static int __hw_perf_event_init(struct perf_event *event)
 		return -ENOENT;
 	if (ev > PERF_CPUM_CF_MAX_CTR)
-		return -EINVAL;
+		return -ENOENT;
 	/* Obtain the counter set to which the specified counter belongs */
 	set = get_counter_set(ev);
--- a/arch/s390/kernel/vdso32/Makefile
+++ b/arch/s390/kernel/vdso32/Makefile
@@ -36,7 +36,7 @@ UBSAN_SANITIZE := n
 $(obj)/vdso32_wrapper.o : $(obj)/vdso32.so
 # link rule for the .so file, .lds has to be first
-$(obj)/vdso32.so.dbg: $(src)/vdso32.lds $(obj-vdso32)
+$(obj)/vdso32.so.dbg: $(src)/vdso32.lds $(obj-vdso32) FORCE
 	$(call if_changed,vdso32ld)
 # strip rule for the .so file
@@ -45,12 +45,12 @@ $(obj)/%.so: $(obj)/%.so.dbg FORCE
 	$(call if_changed,objcopy)
 # assembly rules for the .S files
-$(obj-vdso32): %.o: %.S
+$(obj-vdso32): %.o: %.S FORCE
 	$(call if_changed_dep,vdso32as)
 # actual build commands
 quiet_cmd_vdso32ld = VDSO32L $@
-      cmd_vdso32ld = $(CC) $(c_flags) -Wl,-T $^ -o $@
+      cmd_vdso32ld = $(CC) $(c_flags) -Wl,-T $(filter %.lds %.o,$^) -o $@
 quiet_cmd_vdso32as = VDSO32A $@
      cmd_vdso32as = $(CC) $(a_flags) -c -o $@ $<
--- a/arch/s390/kernel/vdso64/Makefile
+++ b/arch/s390/kernel/vdso64/Makefile
@@ -36,7 +36,7 @@ UBSAN_SANITIZE := n
 $(obj)/vdso64_wrapper.o : $(obj)/vdso64.so
 # link rule for the .so file, .lds has to be first
-$(obj)/vdso64.so.dbg: $(src)/vdso64.lds $(obj-vdso64)
+$(obj)/vdso64.so.dbg: $(src)/vdso64.lds $(obj-vdso64) FORCE
 	$(call if_changed,vdso64ld)
 # strip rule for the .so file
@@ -45,12 +45,12 @@ $(obj)/%.so: $(obj)/%.so.dbg FORCE
 	$(call if_changed,objcopy)
 # assembly rules for the .S files
-$(obj-vdso64): %.o: %.S
+$(obj-vdso64): %.o: %.S FORCE
 	$(call if_changed_dep,vdso64as)
 # actual build commands
 quiet_cmd_vdso64ld = VDSO64L $@
-      cmd_vdso64ld = $(CC) $(c_flags) -Wl,-T $^ -o $@
+      cmd_vdso64ld = $(CC) $(c_flags) -Wl,-T $(filter %.lds %.o,$^) -o $@
 quiet_cmd_vdso64as = VDSO64A $@
      cmd_vdso64as = $(CC) $(a_flags) -c -o $@ $<
--- a/arch/s390/mm/pgalloc.c
+++ b/arch/s390/mm/pgalloc.c
@@ -101,6 +101,7 @@ int crst_table_upgrade(struct mm_struct *mm, unsigned long end)
 			mm->context.asce_limit = _REGION1_SIZE;
 			mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
 				_ASCE_USER_BITS | _ASCE_TYPE_REGION2;
 			mm_inc_nr_puds(mm);
 		} else {
 			crst_table_init(table, _REGION1_ENTRY_EMPTY);
 			pgd_populate(mm, (pgd_t *) table, (p4d_t *) pgd);
--- a/arch/s390/numa/numa.c
+++ b/arch/s390/numa/numa.c
@@ -54,6 +54,7 @@ int __node_distance(int a, int b)
 {
 	return mode->distance ? mode->distance(a, b) : 0;
 }
 EXPORT_SYMBOL(__node_distance);
 int numa_debug_enabled;
--- a/arch/sh/kernel/ftrace.c
+++ b/arch/sh/kernel/ftrace.c
@@ -321,8 +321,7 @@ int ftrace_disable_ftrace_graph_caller(void)
 void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
 {
 	unsigned long old;
-	int faulted, err;
+	int faulted;
 	struct ftrace_graph_ent trace;
 	unsigned long return_hooker = (unsigned long)&return_to_handler;
 	if (unlikely(ftrace_graph_is_dead()))
@@ -365,18 +364,7 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
 		return;
 	}
-	err = ftrace_push_return_trace(old, self_addr, &trace.depth, 0, NULL);
+	if (function_graph_enter(old, self_addr, 0, NULL))
 	if (err == -EBUSY) {
 		__raw_writel(old, parent);
 		return;
 	}
 	trace.func = self_addr;
 	/* Only trace if the calling function expects to */
 	if (!ftrace_graph_entry(&trace)) {
 		current->curr_ret_stack--;
 		__raw_writel(old, parent);
 	}
 }
 #endif /* CONFIG_FUNCTION_GRAPH_TRACER */
--- a/arch/sparc/kernel/ftrace.c
+++ b/arch/sparc/kernel/ftrace.c
@@ -126,20 +126,11 @@ unsigned long prepare_ftrace_return(unsigned long parent,
 				    unsigned long frame_pointer)
 {
 	unsigned long return_hooker = (unsigned long) &return_to_handler;
 	struct ftrace_graph_ent trace;
 	if (unlikely(atomic_read(&current->tracing_graph_pause)))
 		return parent + 8UL;
-	trace.func = self_addr;
+	if (function_graph_enter(parent, self_addr, frame_pointer, NULL))
 	trace.depth = current->curr_ret_stack + 1;
 	/* Only trace if the calling function expects to */
 	if (!ftrace_graph_entry(&trace))
 		return parent + 8UL;
 	if (ftrace_push_return_trace(parent, self_addr, &trace.depth,
 				     frame_pointer, NULL) == -EBUSY)
 		return parent + 8UL;
 	return return_hooker;
--- a/arch/um/os-Linux/skas/process.c
+++ b/arch/um/os-Linux/skas/process.c
@@ -612,6 +612,7 @@ int start_idle_thread(void *stack, jmp_buf *switch_buf)
 	longjmp(*switch_buf, 1);
 	/* unreachable */
 	printk(UM_KERN_ERR "impossible long jump!");
 	fatal_sigsegv();
 	return 0;
 }
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -441,10 +441,6 @@ config RETPOLINE
 	  branches. Requires a compiler with -mindirect-branch=thunk-extern
 	  support for full protection. The kernel may run slower.
 	  Without compiler support, at least indirect branches in assembler
 	  code are eliminated. Since this includes the syscall entry path,
 	  it is not entirely pointless.
 config INTEL_RDT
 	bool "Intel Resource Director Technology support"
 	default n
@@ -1005,13 +1001,7 @@ config NR_CPUS
 	  to the kernel image.
 config SCHED_SMT
-	bool "SMT (Hyperthreading) scheduler support"
+	def_bool y if SMP
 	depends on SMP
 	---help---
 	  SMT scheduler support improves the CPU scheduler's decision making
 	  when dealing with Intel Pentium 4 chips with HyperThreading at a
 	  cost of slightly increased overhead in some places. If unsure say
 	  N here.
 config SCHED_MC
 	def_bool y
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -223,9 +223,10 @@ KBUILD_CFLAGS += -fno-asynchronous-unwind-tables
 # Avoid indirect branches in kernel to deal with Spectre
 ifdef CONFIG_RETPOLINE
-ifneq ($(RETPOLINE_CFLAGS),)
+ifeq ($(RETPOLINE_CFLAGS),)
-  KBUILD_CFLAGS += $(RETPOLINE_CFLAGS) -DRETPOLINE
+  $(error You are building kernel with non-retpoline compiler, please update your compiler.)
 endif
  KBUILD_CFLAGS += $(RETPOLINE_CFLAGS)
 endif
 archscripts: scripts_basic
@@ -296,13 +297,6 @@ PHONY += vdso_install
 vdso_install:
 	$(Q)$(MAKE) $(build)=arch/x86/entry/vdso $@
 archprepare: checkbin
 checkbin:
 ifndef CC_HAVE_ASM_GOTO
 	@echo Compiler lacks asm-goto support.
 	@exit 1
 endif
 archclean:
 	$(Q)rm -rf $(objtree)/arch/i386
 	$(Q)rm -rf $(objtree)/arch/x86_64
--- a/arch/x86/boot/compressed/eboot.c
+++ b/arch/x86/boot/compressed/eboot.c
@@ -1,3 +1,4 @@
 /* -----------------------------------------------------------------------
 *
 *   Copyright 2011 Intel Corporation; author Matt Fleming
@@ -634,37 +635,54 @@ static efi_status_t alloc_e820ext(u32 nr_desc, struct setup_data **e820ext,
 	return status;
 }
 static efi_status_t allocate_e820(struct boot_params *params,
 				  struct setup_data **e820ext,
 				  u32 *e820ext_size)
 {
 	unsigned long map_size, desc_size, buff_size;
 	struct efi_boot_memmap boot_map;
 	efi_memory_desc_t *map;
 	efi_status_t status;
 	__u32 nr_desc;
 	boot_map.map		= &map;
 	boot_map.map_size	= &map_size;
 	boot_map.desc_size	= &desc_size;
 	boot_map.desc_ver	= NULL;
 	boot_map.key_ptr	= NULL;
 	boot_map.buff_size	= &buff_size;
 	status = efi_get_memory_map(sys_table, &boot_map);
 	if (status != EFI_SUCCESS)
 		return status;
 	nr_desc = buff_size / desc_size;
 	if (nr_desc > ARRAY_SIZE(params->e820_table)) {
 		u32 nr_e820ext = nr_desc - ARRAY_SIZE(params->e820_table);
 		status = alloc_e820ext(nr_e820ext, e820ext, e820ext_size);
 		if (status != EFI_SUCCESS)
 			return status;
 	}
 	return EFI_SUCCESS;
 }
 struct exit_boot_struct {
 	struct boot_params	*boot_params;
 	struct efi_info		*efi;
 	struct setup_data	*e820ext;
 	__u32			e820ext_size;
 };
 static efi_status_t exit_boot_func(efi_system_table_t *sys_table_arg,
 				   struct efi_boot_memmap *map,
 				   void *priv)
 {
 	static bool first = true;
 	const char *signature;
 	__u32 nr_desc;
 	efi_status_t status;
 	struct exit_boot_struct *p = priv;
 	if (first) {
 		nr_desc = *map->buff_size / *map->desc_size;
 		if (nr_desc > ARRAY_SIZE(p->boot_params->e820_table)) {
 			u32 nr_e820ext = nr_desc -
 					ARRAY_SIZE(p->boot_params->e820_table);
 			status = alloc_e820ext(nr_e820ext, &p->e820ext,
 					       &p->e820ext_size);
 			if (status != EFI_SUCCESS)
 				return status;
 		}
 		first = false;
 	}
 	signature = efi_is_64bit() ? EFI64_LOADER_SIGNATURE
 				   : EFI32_LOADER_SIGNATURE;
 	memcpy(&p->efi->efi_loader_signature, signature, sizeof(__u32));
@@ -687,8 +705,8 @@ static efi_status_t exit_boot(struct boot_params *boot_params, void *handle)
 {
 	unsigned long map_sz, key, desc_size, buff_size;
 	efi_memory_desc_t *mem_map;
-	struct setup_data *e820ext;
+	struct setup_data *e820ext = NULL;
-	__u32 e820ext_size;
+	__u32 e820ext_size = 0;
 	efi_status_t status;
 	__u32 desc_version;
 	struct efi_boot_memmap map;
@@ -702,8 +720,10 @@ static efi_status_t exit_boot(struct boot_params *boot_params, void *handle)
 	map.buff_size		= &buff_size;
 	priv.boot_params	= boot_params;
 	priv.efi		= &boot_params->efi_info;
-	priv.e820ext		= NULL;
+
-	priv.e820ext_size	= 0;
+	status = allocate_e820(boot_params, &e820ext, &e820ext_size);
 	if (status != EFI_SUCCESS)
 		return status;
 	/* Might as well exit boot services now */
 	status = efi_exit_boot_services(sys_table, handle, &map, &priv,
@@ -711,9 +731,6 @@ static efi_status_t exit_boot(struct boot_params *boot_params, void *handle)
 	if (status != EFI_SUCCESS)
 		return status;
 	e820ext			= priv.e820ext;
 	e820ext_size		= priv.e820ext_size;
 	/* Historic? */
 	boot_params->alt_mem_k	= 32 * 1024;
--- a/arch/x86/configs/x86_64_cuttlefish_defconfig
+++ b/arch/x86/configs/x86_64_cuttlefish_defconfig
@@ -1,9 +1,9 @@
 CONFIG_POSIX_MQUEUE=y
 # CONFIG_FHANDLE is not set
 # CONFIG_USELIB is not set
 CONFIG_AUDIT=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_TASKSTATS=y
 CONFIG_TASK_DELAY_ACCT=y
@@ -17,26 +17,20 @@ CONFIG_MEMCG_SWAP=y
 CONFIG_CGROUP_SCHED=y
 CONFIG_RT_GROUP_SCHED=y
 CONFIG_CGROUP_FREEZER=y
 CONFIG_CPUSETS=y
 # CONFIG_PROC_PID_CPUSET is not set
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_CGROUP_BPF=y
 CONFIG_NAMESPACES=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_RD_LZ4 is not set
-CONFIG_KALLSYMS_ALL=y
+# CONFIG_FHANDLE is not set
 # CONFIG_PCSPKR_PLATFORM is not set
 CONFIG_KALLSYMS_ALL=y
 CONFIG_BPF_SYSCALL=y
 CONFIG_EMBEDDED=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_PROFILING=y
 CONFIG_OPROFILE=y
 CONFIG_KPROBES=y
 CONFIG_JUMP_LABEL=y
 CONFIG_CC_STACKPROTECTOR_STRONG=y
 CONFIG_REFCOUNT_FULL=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_SMP=y
 CONFIG_HYPERVISOR_GUEST=y
 CONFIG_PARAVIRT=y
@@ -45,14 +39,9 @@ CONFIG_MCORE2=y
 CONFIG_PROCESSOR_SELECT=y
 # CONFIG_CPU_SUP_CENTAUR is not set
 CONFIG_NR_CPUS=8
 CONFIG_PREEMPT=y
 # CONFIG_MICROCODE is not set
 CONFIG_X86_MSR=y
 CONFIG_X86_CPUID=y
 CONFIG_KSM=y
 CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
 CONFIG_TRANSPARENT_HUGEPAGE=y
 CONFIG_ZSMALLOC=y
 # CONFIG_MTRR is not set
 CONFIG_HZ_100=y
 CONFIG_KEXEC=y
@@ -71,11 +60,23 @@ CONFIG_ACPI_PROCFS_POWER=y
 # CONFIG_X86_PM_TIMER is not set
 CONFIG_CPU_FREQ_GOV_ONDEMAND=y
 CONFIG_X86_ACPI_CPUFREQ=y
 CONFIG_PCI_MMCONFIG=y
 CONFIG_PCI_MSI=y
 CONFIG_IA32_EMULATION=y
 # CONFIG_FIRMWARE_MEMMAP is not set
 CONFIG_OPROFILE=y
 CONFIG_KPROBES=y
 CONFIG_JUMP_LABEL=y
 CONFIG_REFCOUNT_FULL=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 CONFIG_PARTITION_ADVANCED=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 CONFIG_BINFMT_MISC=y
-CONFIG_IA32_EMULATION=y
+CONFIG_KSM=y
 CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
 CONFIG_TRANSPARENT_HUGEPAGE=y
 CONFIG_ZSMALLOC=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -148,7 +149,6 @@ CONFIG_NETFILTER_XT_MATCH_MAC=y
 CONFIG_NETFILTER_XT_MATCH_MARK=y
 CONFIG_NETFILTER_XT_MATCH_POLICY=y
 CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
 CONFIG_NETFILTER_XT_MATCH_QTAGUID=y
 CONFIG_NETFILTER_XT_MATCH_QUOTA=y
 CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
 CONFIG_NETFILTER_XT_MATCH_SOCKET=y
@@ -157,8 +157,6 @@ CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
 CONFIG_NETFILTER_XT_MATCH_STRING=y
 CONFIG_NETFILTER_XT_MATCH_TIME=y
 CONFIG_NETFILTER_XT_MATCH_U32=y
 CONFIG_NF_CONNTRACK_IPV4=y
 CONFIG_NF_SOCKET_IPV4=y
 CONFIG_IP_NF_IPTABLES=y
 CONFIG_IP_NF_MATCH_AH=y
 CONFIG_IP_NF_MATCH_ECN=y
@@ -175,8 +173,6 @@ CONFIG_IP_NF_SECURITY=y
 CONFIG_IP_NF_ARPTABLES=y
 CONFIG_IP_NF_ARPFILTER=y
 CONFIG_IP_NF_ARP_MANGLE=y
 CONFIG_NF_CONNTRACK_IPV6=y
 CONFIG_NF_SOCKET_IPV6=y
 CONFIG_IP6_NF_IPTABLES=y
 CONFIG_IP6_NF_MATCH_IPV6HEADER=y
 CONFIG_IP6_NF_MATCH_RPFILTER=y
@@ -205,7 +201,6 @@ CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
 CONFIG_VIRTIO_BLK=y
 CONFIG_UID_SYS_STATS=y
 CONFIG_MEMORY_STATE_TIME=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_DEV_SR=y
@@ -221,9 +216,8 @@ CONFIG_DM_MIRROR=y
 CONFIG_DM_ZERO=y
 CONFIG_DM_UEVENT=y
 CONFIG_DM_VERITY=y
-CONFIG_DM_VERITY_HASH_PREFETCH_MIN_SIZE=1
+CONFIG_DM_VERITY_AVB=y
 CONFIG_DM_VERITY_FEC=y
 CONFIG_DM_ANDROID_VERITY=y
 CONFIG_NETDEVICES=y
 CONFIG_NETCONSOLE=y
 CONFIG_NETCONSOLE_DYNAMIC=y
@@ -259,8 +253,8 @@ CONFIG_USB_USBNET=y
 # CONFIG_WLAN_VENDOR_ZYDAS is not set
 # CONFIG_WLAN_VENDOR_QUANTENNA is not set
 CONFIG_MAC80211_HWSIM=y
 CONFIG_VIRT_WIFI=y
 CONFIG_INPUT_EVDEV=y
 CONFIG_INPUT_KEYRESET=y
 # CONFIG_INPUT_KEYBOARD is not set
 # CONFIG_INPUT_MOUSE is not set
 CONFIG_INPUT_JOYSTICK=y
@@ -274,9 +268,7 @@ CONFIG_TABLET_USB_GTCO=y
 CONFIG_TABLET_USB_HANWANG=y
 CONFIG_TABLET_USB_KBTAB=y
 CONFIG_INPUT_MISC=y
 CONFIG_INPUT_KEYCHORD=y
 CONFIG_INPUT_UINPUT=y
 CONFIG_INPUT_GPIO=y
 # CONFIG_SERIO_I8042 is not set
 # CONFIG_VT is not set
 # CONFIG_LEGACY_PTYS is not set
@@ -377,11 +369,15 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_DUMMY_HCD=y
 CONFIG_USB_CONFIGFS=y
 CONFIG_USB_CONFIGFS_UEVENT=y
 CONFIG_USB_CONFIGFS_F_FS=y
 CONFIG_USB_CONFIGFS_F_ACC=y
 CONFIG_USB_CONFIGFS_F_AUDIO_SRC=y
 CONFIG_USB_CONFIGFS_UEVENT=y
 CONFIG_USB_CONFIGFS_F_MIDI=y
 CONFIG_MMC=y
 # CONFIG_PWRSEQ_EMMC is not set
 # CONFIG_PWRSEQ_SIMPLE is not set
 # CONFIG_MMC_BLOCK is not set
 CONFIG_RTC_CLASS=y
 # CONFIG_RTC_HCTOSYS is not set
 CONFIG_SW_SYNC=y
@@ -397,7 +393,6 @@ CONFIG_ION=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_ANDROID=y
 CONFIG_ANDROID_BINDER_IPC=y
 # CONFIG_FIRMWARE_MEMMAP is not set
 CONFIG_EXT4_FS=y
 CONFIG_EXT4_FS_POSIX_ACL=y
 CONFIG_EXT4_FS_SECURITY=y
@@ -425,9 +420,21 @@ CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ASCII=y
 CONFIG_NLS_ISO8859_1=y
 CONFIG_NLS_UTF8=y
 CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
 CONFIG_SECURITY=y
 CONFIG_SECURITY_NETWORK=y
 CONFIG_SECURITY_PATH=y
 CONFIG_HARDENED_USERCOPY=y
 CONFIG_SECURITY_SELINUX=y
 CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
 # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
 CONFIG_CRYPTO_ADIANTUM=y
 CONFIG_CRYPTO_SHA512=y
 CONFIG_CRYPTO_LZ4=y
 CONFIG_CRYPTO_ZSTD=y
 CONFIG_CRYPTO_DEV_VIRTIO=y
 CONFIG_PRINTK_TIME=y
 CONFIG_DEBUG_INFO=y
 # CONFIG_ENABLE_WARN_DEPRECATED is not set
 # CONFIG_ENABLE_MUST_CHECK is not set
 CONFIG_FRAME_WARN=1024
 # CONFIG_UNUSED_SYMBOLS is not set
@@ -444,21 +451,3 @@ CONFIG_IO_DELAY_NONE=y
 CONFIG_DEBUG_BOOT_PARAMS=y
 CONFIG_OPTIMIZE_INLINING=y
 CONFIG_UNWINDER_FRAME_POINTER=y
 CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
 CONFIG_SECURITY=y
 CONFIG_SECURITY_NETWORK=y
 CONFIG_SECURITY_PATH=y
 CONFIG_HARDENED_USERCOPY=y
 CONFIG_SECURITY_SELINUX=y
 CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
 CONFIG_CRYPTO_RSA=y
 # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
 CONFIG_CRYPTO_SHA512=y
 CONFIG_CRYPTO_LZ4=y
 CONFIG_CRYPTO_ZSTD=y
 CONFIG_CRYPTO_DEV_VIRTIO=y
 CONFIG_ASYMMETRIC_KEY_TYPE=y
 CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
 CONFIG_X509_CERTIFICATE_PARSER=y
 CONFIG_SYSTEM_TRUSTED_KEYRING=y
 CONFIG_SYSTEM_TRUSTED_KEYS="verity_dev_keys.x509"
--- a/arch/x86/crypto/chacha20_glue.c
+++ b/arch/x86/crypto/chacha20_glue.c
@@ -10,7 +10,7 @@
 */
 #include <crypto/algapi.h>
-#include <crypto/chacha20.h>
+#include <crypto/chacha.h>
 #include <crypto/internal/skcipher.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
@@ -29,31 +29,31 @@ static bool chacha20_use_avx2;
 static void chacha20_dosimd(u32 *state, u8 *dst, const u8 *src,
 			    unsigned int bytes)
 {
-	u8 buf[CHACHA20_BLOCK_SIZE];
+	u8 buf[CHACHA_BLOCK_SIZE];
 #ifdef CONFIG_AS_AVX2
 	if (chacha20_use_avx2) {
-		while (bytes >= CHACHA20_BLOCK_SIZE * 8) {
+		while (bytes >= CHACHA_BLOCK_SIZE * 8) {
 			chacha20_8block_xor_avx2(state, dst, src);
-			bytes -= CHACHA20_BLOCK_SIZE * 8;
+			bytes -= CHACHA_BLOCK_SIZE * 8;
-			src += CHACHA20_BLOCK_SIZE * 8;
+			src += CHACHA_BLOCK_SIZE * 8;
-			dst += CHACHA20_BLOCK_SIZE * 8;
+			dst += CHACHA_BLOCK_SIZE * 8;
 			state[12] += 8;
 		}
 	}
 #endif
-	while (bytes >= CHACHA20_BLOCK_SIZE * 4) {
+	while (bytes >= CHACHA_BLOCK_SIZE * 4) {
 		chacha20_4block_xor_ssse3(state, dst, src);
-		bytes -= CHACHA20_BLOCK_SIZE * 4;
+		bytes -= CHACHA_BLOCK_SIZE * 4;
-		src += CHACHA20_BLOCK_SIZE * 4;
+		src += CHACHA_BLOCK_SIZE * 4;
-		dst += CHACHA20_BLOCK_SIZE * 4;
+		dst += CHACHA_BLOCK_SIZE * 4;
 		state[12] += 4;
 	}
-	while (bytes >= CHACHA20_BLOCK_SIZE) {
+	while (bytes >= CHACHA_BLOCK_SIZE) {
 		chacha20_block_xor_ssse3(state, dst, src);
-		bytes -= CHACHA20_BLOCK_SIZE;
+		bytes -= CHACHA_BLOCK_SIZE;
-		src += CHACHA20_BLOCK_SIZE;
+		src += CHACHA_BLOCK_SIZE;
-		dst += CHACHA20_BLOCK_SIZE;
+		dst += CHACHA_BLOCK_SIZE;
 		state[12]++;
 	}
 	if (bytes) {
@@ -66,7 +66,7 @@ static void chacha20_dosimd(u32 *state, u8 *dst, const u8 *src,
 static int chacha20_simd(struct skcipher_request *req)
 {
 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
-	struct chacha20_ctx *ctx = crypto_skcipher_ctx(tfm);
+	struct chacha_ctx *ctx = crypto_skcipher_ctx(tfm);
 	u32 *state, state_buf[16 + 2] __aligned(8);
 	struct skcipher_walk walk;
 	int err;
@@ -74,20 +74,20 @@ static int chacha20_simd(struct skcipher_request *req)
 	BUILD_BUG_ON(CHACHA20_STATE_ALIGN != 16);
 	state = PTR_ALIGN(state_buf + 0, CHACHA20_STATE_ALIGN);
-	if (req->cryptlen <= CHACHA20_BLOCK_SIZE || !may_use_simd())
+	if (req->cryptlen <= CHACHA_BLOCK_SIZE || !may_use_simd())
-		return crypto_chacha20_crypt(req);
+		return crypto_chacha_crypt(req);
 	err = skcipher_walk_virt(&walk, req, true);
-	crypto_chacha20_init(state, ctx, walk.iv);
+	crypto_chacha_init(state, ctx, walk.iv);
 	kernel_fpu_begin();
-	while (walk.nbytes >= CHACHA20_BLOCK_SIZE) {
+	while (walk.nbytes >= CHACHA_BLOCK_SIZE) {
 		chacha20_dosimd(state, walk.dst.virt.addr, walk.src.virt.addr,
-				rounddown(walk.nbytes, CHACHA20_BLOCK_SIZE));
+				rounddown(walk.nbytes, CHACHA_BLOCK_SIZE));
 		err = skcipher_walk_done(&walk,
-					 walk.nbytes % CHACHA20_BLOCK_SIZE);
+					 walk.nbytes % CHACHA_BLOCK_SIZE);
 	}
 	if (walk.nbytes) {
@@ -106,13 +106,13 @@ static struct skcipher_alg alg = {
 	.base.cra_driver_name	= "chacha20-simd",
 	.base.cra_priority	= 300,
 	.base.cra_blocksize	= 1,
-	.base.cra_ctxsize	= sizeof(struct chacha20_ctx),
+	.base.cra_ctxsize	= sizeof(struct chacha_ctx),
 	.base.cra_module	= THIS_MODULE,
-	.min_keysize		= CHACHA20_KEY_SIZE,
+	.min_keysize		= CHACHA_KEY_SIZE,
-	.max_keysize		= CHACHA20_KEY_SIZE,
+	.max_keysize		= CHACHA_KEY_SIZE,
-	.ivsize			= CHACHA20_IV_SIZE,
+	.ivsize			= CHACHA_IV_SIZE,
-	.chunksize		= CHACHA20_BLOCK_SIZE,
+	.chunksize		= CHACHA_BLOCK_SIZE,
 	.setkey			= crypto_chacha20_setkey,
 	.encrypt		= chacha20_simd,
 	.decrypt		= chacha20_simd,
--- a/arch/x86/crypto/poly1305_glue.c
+++ b/arch/x86/crypto/poly1305_glue.c
@@ -83,35 +83,37 @@ static unsigned int poly1305_simd_blocks(struct poly1305_desc_ctx *dctx,
 	if (poly1305_use_avx2 && srclen >= POLY1305_BLOCK_SIZE * 4) {
 		if (unlikely(!sctx->wset)) {
 			if (!sctx->uset) {
-				memcpy(sctx->u, dctx->r, sizeof(sctx->u));
+				memcpy(sctx->u, dctx->r.r, sizeof(sctx->u));
-				poly1305_simd_mult(sctx->u, dctx->r);
+				poly1305_simd_mult(sctx->u, dctx->r.r);
 				sctx->uset = true;
 			}
 			memcpy(sctx->u + 5, sctx->u, sizeof(sctx->u));
-			poly1305_simd_mult(sctx->u + 5, dctx->r);
+			poly1305_simd_mult(sctx->u + 5, dctx->r.r);
 			memcpy(sctx->u + 10, sctx->u + 5, sizeof(sctx->u));
-			poly1305_simd_mult(sctx->u + 10, dctx->r);
+			poly1305_simd_mult(sctx->u + 10, dctx->r.r);
 			sctx->wset = true;
 		}
 		blocks = srclen / (POLY1305_BLOCK_SIZE * 4);
-		poly1305_4block_avx2(dctx->h, src, dctx->r, blocks, sctx->u);
+		poly1305_4block_avx2(dctx->h.h, src, dctx->r.r, blocks,
 				     sctx->u);
 		src += POLY1305_BLOCK_SIZE * 4 * blocks;
 		srclen -= POLY1305_BLOCK_SIZE * 4 * blocks;
 	}
 #endif
 	if (likely(srclen >= POLY1305_BLOCK_SIZE * 2)) {
 		if (unlikely(!sctx->uset)) {
-			memcpy(sctx->u, dctx->r, sizeof(sctx->u));
+			memcpy(sctx->u, dctx->r.r, sizeof(sctx->u));
-			poly1305_simd_mult(sctx->u, dctx->r);
+			poly1305_simd_mult(sctx->u, dctx->r.r);
 			sctx->uset = true;
 		}
 		blocks = srclen / (POLY1305_BLOCK_SIZE * 2);
-		poly1305_2block_sse2(dctx->h, src, dctx->r, blocks, sctx->u);
+		poly1305_2block_sse2(dctx->h.h, src, dctx->r.r, blocks,
 				     sctx->u);
 		src += POLY1305_BLOCK_SIZE * 2 * blocks;
 		srclen -= POLY1305_BLOCK_SIZE * 2 * blocks;
 	}
 	if (srclen >= POLY1305_BLOCK_SIZE) {
-		poly1305_block_sse2(dctx->h, src, dctx->r, 1);
+		poly1305_block_sse2(dctx->h.h, src, dctx->r.r, 1);
 		srclen -= POLY1305_BLOCK_SIZE;
 	}
 	return srclen;
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -438,26 +438,6 @@ int x86_setup_perfctr(struct perf_event *event)
 	if (config == -1LL)
 		return -EINVAL;
 	/*
 	 * Branch tracing:
 	 */
 	if (attr->config == PERF_COUNT_HW_BRANCH_INSTRUCTIONS &&
 	    !attr->freq && hwc->sample_period == 1) {
 		/* BTS is not supported by this architecture. */
 		if (!x86_pmu.bts_active)
 			return -EOPNOTSUPP;
 		/* BTS is currently only allowed for user-mode. */
 		if (!attr->exclude_kernel)
 			return -EOPNOTSUPP;
 		/* disallow bts if conflicting events are present */
 		if (x86_add_exclusive(x86_lbr_exclusive_lbr))
 			return -EBUSY;
 		event->destroy = hw_perf_lbr_event_destroy;
 	}
 	hwc->config |= config;
 	return 0;
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -2358,16 +2358,7 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
 static struct event_constraint *
 intel_bts_constraints(struct perf_event *event)
 {
-	struct hw_perf_event *hwc = &event->hw;
+	if (unlikely(intel_pmu_has_bts(event)))
 	unsigned int hw_event, bts_event;
 	if (event->attr.freq)
 		return NULL;
 	hw_event = hwc->config & INTEL_ARCH_EVENT_MASK;
 	bts_event = x86_pmu.event_map(PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
 	if (unlikely(hw_event == bts_event && hwc->sample_period == 1))
 		return &bts_constraint;
 	return NULL;
@@ -2986,10 +2977,51 @@ static unsigned long intel_pmu_large_pebs_flags(struct perf_event *event)
 	return flags;
 }
 static int intel_pmu_bts_config(struct perf_event *event)
 {
 	struct perf_event_attr *attr = &event->attr;
 	if (unlikely(intel_pmu_has_bts(event))) {
 		/* BTS is not supported by this architecture. */
 		if (!x86_pmu.bts_active)
 			return -EOPNOTSUPP;
 		/* BTS is currently only allowed for user-mode. */
 		if (!attr->exclude_kernel)
 			return -EOPNOTSUPP;
 		/* BTS is not allowed for precise events. */
 		if (attr->precise_ip)
 			return -EOPNOTSUPP;
 		/* disallow bts if conflicting events are present */
 		if (x86_add_exclusive(x86_lbr_exclusive_lbr))
 			return -EBUSY;
 		event->destroy = hw_perf_lbr_event_destroy;
 	}
 	return 0;
 }
 static int core_pmu_hw_config(struct perf_event *event)
 {
 	int ret = x86_pmu_hw_config(event);
 	if (ret)
 		return ret;
 	return intel_pmu_bts_config(event);
 }
 static int intel_pmu_hw_config(struct perf_event *event)
 {
 	int ret = x86_pmu_hw_config(event);
 	if (ret)
 		return ret;
 	ret = intel_pmu_bts_config(event);
 	if (ret)
 		return ret;
@@ -3015,7 +3047,7 @@ static int intel_pmu_hw_config(struct perf_event *event)
 		/*
 		 * BTS is set up earlier in this path, so don't account twice
 		 */
-		if (!intel_pmu_has_bts(event)) {
+		if (!unlikely(intel_pmu_has_bts(event))) {
 			/* disallow lbr if conflicting events are present */
 			if (x86_add_exclusive(x86_lbr_exclusive_lbr))
 				return -EBUSY;
@@ -3478,7 +3510,7 @@ static __initconst const struct x86_pmu core_pmu = {
 	.enable_all		= core_pmu_enable_all,
 	.enable			= core_pmu_enable_event,
 	.disable		= x86_pmu_disable_event,
-	.hw_config		= x86_pmu_hw_config,
+	.hw_config		= core_pmu_hw_config,
 	.schedule_events	= x86_schedule_events,
 	.eventsel		= MSR_ARCH_PERFMON_EVENTSEL0,
 	.perfctr		= MSR_ARCH_PERFMON_PERFCTR0,
--- a/arch/x86/events/intel/uncore_snb.c
+++ b/arch/x86/events/intel/uncore_snb.c
@@ -15,6 +15,25 @@
 #define PCI_DEVICE_ID_INTEL_SKL_HQ_IMC	0x1910
 #define PCI_DEVICE_ID_INTEL_SKL_SD_IMC	0x190f
 #define PCI_DEVICE_ID_INTEL_SKL_SQ_IMC	0x191f
 #define PCI_DEVICE_ID_INTEL_KBL_Y_IMC	0x590c
 #define PCI_DEVICE_ID_INTEL_KBL_U_IMC	0x5904
 #define PCI_DEVICE_ID_INTEL_KBL_UQ_IMC	0x5914
 #define PCI_DEVICE_ID_INTEL_KBL_SD_IMC	0x590f
 #define PCI_DEVICE_ID_INTEL_KBL_SQ_IMC	0x591f
 #define PCI_DEVICE_ID_INTEL_CFL_2U_IMC	0x3ecc
 #define PCI_DEVICE_ID_INTEL_CFL_4U_IMC	0x3ed0
 #define PCI_DEVICE_ID_INTEL_CFL_4H_IMC	0x3e10
 #define PCI_DEVICE_ID_INTEL_CFL_6H_IMC	0x3ec4
 #define PCI_DEVICE_ID_INTEL_CFL_2S_D_IMC	0x3e0f
 #define PCI_DEVICE_ID_INTEL_CFL_4S_D_IMC	0x3e1f
 #define PCI_DEVICE_ID_INTEL_CFL_6S_D_IMC	0x3ec2
 #define PCI_DEVICE_ID_INTEL_CFL_8S_D_IMC	0x3e30
 #define PCI_DEVICE_ID_INTEL_CFL_4S_W_IMC	0x3e18
 #define PCI_DEVICE_ID_INTEL_CFL_6S_W_IMC	0x3ec6
 #define PCI_DEVICE_ID_INTEL_CFL_8S_W_IMC	0x3e31
 #define PCI_DEVICE_ID_INTEL_CFL_4S_S_IMC	0x3e33
 #define PCI_DEVICE_ID_INTEL_CFL_6S_S_IMC	0x3eca
 #define PCI_DEVICE_ID_INTEL_CFL_8S_S_IMC	0x3e32
 /* SNB event control */
 #define SNB_UNC_CTL_EV_SEL_MASK			0x000000ff
@@ -569,7 +588,82 @@ static const struct pci_device_id skl_uncore_pci_ids[] = {
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SKL_SQ_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
-
+	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBL_Y_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBL_U_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBL_UQ_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBL_SD_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KBL_SQ_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_2U_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_4U_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_4H_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_6H_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_2S_D_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_4S_D_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_6S_D_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_8S_D_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_4S_W_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_6S_W_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_8S_W_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_4S_S_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_6S_S_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* IMC */
 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CFL_8S_S_IMC),
 		.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
 	},
 	{ /* end: all zeroes */ },
 };
@@ -618,6 +712,25 @@ static const struct imc_uncore_pci_dev desktop_imc_pci_ids[] = {
 	IMC_DEV(SKL_HQ_IMC, &skl_uncore_pci_driver),  /* 6th Gen Core H Quad Core */
 	IMC_DEV(SKL_SD_IMC, &skl_uncore_pci_driver),  /* 6th Gen Core S Dual Core */
 	IMC_DEV(SKL_SQ_IMC, &skl_uncore_pci_driver),  /* 6th Gen Core S Quad Core */
 	IMC_DEV(KBL_Y_IMC, &skl_uncore_pci_driver),  /* 7th Gen Core Y */
 	IMC_DEV(KBL_U_IMC, &skl_uncore_pci_driver),  /* 7th Gen Core U */
 	IMC_DEV(KBL_UQ_IMC, &skl_uncore_pci_driver),  /* 7th Gen Core U Quad Core */
 	IMC_DEV(KBL_SD_IMC, &skl_uncore_pci_driver),  /* 7th Gen Core S Dual Core */
 	IMC_DEV(KBL_SQ_IMC, &skl_uncore_pci_driver),  /* 7th Gen Core S Quad Core */
 	IMC_DEV(CFL_2U_IMC, &skl_uncore_pci_driver),  /* 8th Gen Core U 2 Cores */
 	IMC_DEV(CFL_4U_IMC, &skl_uncore_pci_driver),  /* 8th Gen Core U 4 Cores */
 	IMC_DEV(CFL_4H_IMC, &skl_uncore_pci_driver),  /* 8th Gen Core H 4 Cores */
 	IMC_DEV(CFL_6H_IMC, &skl_uncore_pci_driver),  /* 8th Gen Core H 6 Cores */
 	IMC_DEV(CFL_2S_D_IMC, &skl_uncore_pci_driver),  /* 8th Gen Core S 2 Cores Desktop */
 	IMC_DEV(CFL_4S_D_IMC, &skl_uncore_pci_driver),  /* 8th Gen Core S 4 Cores Desktop */
 	IMC_DEV(CFL_6S_D_IMC, &skl_uncore_pci_driver),  /* 8th Gen Core S 6 Cores Desktop */
 	IMC_DEV(CFL_8S_D_IMC, &skl_uncore_pci_driver),  /* 8th Gen Core S 8 Cores Desktop */
 	IMC_DEV(CFL_4S_W_IMC, &skl_uncore_pci_driver),  /* 8th Gen Core S 4 Cores Work Station */
 	IMC_DEV(CFL_6S_W_IMC, &skl_uncore_pci_driver),  /* 8th Gen Core S 6 Cores Work Station */
 	IMC_DEV(CFL_8S_W_IMC, &skl_uncore_pci_driver),  /* 8th Gen Core S 8 Cores Work Station */
 	IMC_DEV(CFL_4S_S_IMC, &skl_uncore_pci_driver),  /* 8th Gen Core S 4 Cores Server */
 	IMC_DEV(CFL_6S_S_IMC, &skl_uncore_pci_driver),  /* 8th Gen Core S 6 Cores Server */
 	IMC_DEV(CFL_8S_S_IMC, &skl_uncore_pci_driver),  /* 8th Gen Core S 8 Cores Server */
 	{  /* end marker */ }
 };
--- a/Show More
+++ b/Show More